MT9196AS datasheet(3/38 Pages) MITEL

3 / 38 page

Preliminary Information

MT9196

7-129

STB/F0i

Data Strobe/Frame Pulse (Input). For SSI mode this input determines the 8 bit timeslot

used by the device for both transmit and receive data. This active high signal has a

repetition rate of 8 kHz. Standard frame pulse definitions apply in ST-BUS mode. CMOS

level compatible input.

CLOCKin Clock Input. The clock provided to this input is used by the internal phone functions. In ST-

BUS mode this is the C4i input. In SSI synchronous mode, this is the Bit Clock input. In

SSI-asynchronous mode this is an asynchronous 4 MHz Master Clock input.

XSTL2

Crystal Input (4.096 MHz). Used in conjunction with the CLOCKin pin to provide the master

clock signal via external crystal.

VDD

Positive Power Supply (Input). Nominally 5 volts.

HSPKR-

Inverting Handset Speaker (Output). Output to the handset speaker (balanced).

HSPKR+ Non-Inverting Handset Speaker (Output). Output to the handset speaker (balanced).

SPKR-

Inverting Speaker (Output). Output to the speakerphone speaker (balanced).

SPKR+

Non-Inverting Speaker (Output). Output to the speakerphone speaker (balanced).

VSSSPKR Power Supply Rail for Speaker Driver. Nominally 0 Volts.

AUXout

Auxiliary Port (Output). Access point to the D/A (analog) signals of the receive path as

well as to the various analog inputs.

AUXin

Auxiliary Port (Input). An analog signal may be fed to the filter/codec transmit section and

various loopback paths via this pin. No external anti-aliasing is required.

MIC+

Non-inverting on-hook answer back Microphone (Input). Microphone amplifier non-

inverting input pin.

VSSA

Analog Ground (Input). Nominally 0 V.

Pin Description (continued)

Pin #

Name

Description

MT9196AS Datasheet(PDF) 3 Page - Mitel Networks Corporation