DP83820 datasheet(49/87 Pages) NSC

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4.0 Register Set (Continued)

4.2.11 Transmit Descriptor Pointer High Dword Register

This register points to the upper 32-bits of the current Transmit Descriptor for 64-bit addressing. If Transmit Priority

Queueing is enabled, this becomes the Descriptor pointer for all priority queues.

4.2.12 Transmit Configuration Register

This register defines the Transmit Configuration for DP83820. It controls such functions as Loopback, Heartbeat, Auto

Transmit Padding, programmable Interframe Gap, Fill & Drain Thresholds, and maximum DMA burst size.

Tag: TXDP_HI

Size: 32 bits

Hard Reset: 00000000h

Offset: 0024h

Access: Read Write

Soft Reset: 00000000h

bit

tag

description

usage

31-0

TXDP_HI

Transmit Descriptor Pointer

High Dword

If 64-bit addressing is enabled, this will be used as the upper 32-bits of the

current transmit descriptor pointer.

Tag: TXCFG

Size: 32 bits

Hard Reset: 00000120

Offset: 0028h

Access: Read Write

Soft Reset: 00000120

bit

tag

description

usage

CSI

Carrier Sense Ignore

Setting this bit to 1 causes the transmitter to ignore carrier sense activity,

which inhibits reporting of CRS status to the transmit status register, and

inhibits logging of TXCSErrors in the MIB counter block. When this bit is 0

(default), the transmitter will monitor the CRS signal during transmission

and reflect valid status in the transmit status register and MIB counter

block. This bit must be set to enable full-duplex operation.

HBI

HeartBeat Ignore

Setting this bit to 1 causes the transmitter to ignore the heartbeat (CD)

pulse which follows the packet transmission and inhibits logging of

TXSQEErrors in the MIB counter block. When this bit is set to 0 (default),

the transmitter will monitor the heartbeat pulse and log TXSQEErrors to the

MIB counter block. This bit must be set to enable full-duplex operation

MLB

MAC Loopback

Setting this bit to a 1 places the DP83820 MAC into a loopback state which

routes all transmit traffic to the receiver, and disables the transmit and

receive interfaces of the MII. A 0 in this bit allows normal MAC operation.

The transmitter and receiver must be disabled before enabling the loopback

mode. (Packets received during MLB mode will reflect loopback status in

the receive descriptor’s

cmdsts.LBP field.)

ATP

Automatic Transmit Padding

Setting this bit to 1 causes the MAC to automatically pad small (runt)

transmit packets to the Ethernet minimum size of 64 bytes. This allows

driver software to transfer only actual packet data. Setting this bit to 0

disables the automatic padding function, forcing software to control runt

padding.

27-24

unused

ECRETRY

Excessive Collision Retry

Enable

This bit enables automatic retries of excessive collisions. If set, the

transmitter will retry the packet up to 4 excessive collision counts, for a total

of 64 attempts. If the packet still does not complete successfully, then the

transmission will be aborted after the 64th attempt. If this bit is not set, then

the transmission will be aborted after the 16th attempt. Note that setting

this bit will change how collisions are reported in the status field of the

transmit descriptor.

DP83820 Datasheet(PDF) 49 Page - National Semiconductor (TI)

DP83820 Datasheet(HTML) 49 Page - National Semiconductor (TI)

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