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PC87393F Datasheet(PDF) 23 Page - National Semiconductor (TI) |
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PC87393F Datasheet(HTML) 23 Page - National Semiconductor (TI) |
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23 / 148 page  1.0 Signal/Pin Connection and Description (Continued) 23 www.national.com 1.5.11 Strap Configuration 1.5.12 Wake-Up Control 1.5.13 WATCHDOG Timer 1.5.14 X-Bus Extension (PC87393 and PC87393F) Signal Pin/s I/O Buffer Type Power Well Description BADDR 61 I INSTRP VDD Base Address. Sampled at Reset to determine the base address of the configuration Index-Data register pair, as follows. No pull-up resistor: 2Eh-2Fh 10K external pull-up resistor: 4Eh-4Fh TEST 58 I INSTRP VDD Test. Forces the device into test mode if an external pull-up resistor is connected. Otherwise, the pin is pulled to ‘0’ (zero) by the internal resistor. XCNF2-0 90, 4, 59 IINSTRP VDD X-Bus Reset Configuration Mode. Forces the X-Bus transaction to be in one of the following modes: no BIOS, normal or latch. For details, see Chapter 7. Pins 2 1 0 Functionality x 0 0 No BIOS1 x 0 1 Normal Mode, XRDY disabled 0 1 0 Latch Mode, XA12-19, XRDY enabled 1 1 0 Latch Mode, GPIO10-17, XRDY enabled 0 1 1 Latch Mode, XA12-19, XRDY disabled 1 1 1 Latch Mode, GPIO10-17, XRDY disabled Pulled to 0 by internal resistor, or set to 1 by external 10K pull-up resistor. 1. In the PC87391 and PC87392, the XCNFi signals must be set to this value. This is value is guaranteed by the internal pull-down resistors, as long as the pins are not connected, or the load is small enough. Signal Pin/s I/O Buffer Type Power Well Description PWUREQ 66 O OD6 VDD Power-Up Request. Active (low) level indicates that wake-up event has occurred, and causes the chipset to turn the power supply on, or to exit its current sleep state. Signal Pin/s I/O Buffer Type Power Well Description WDO 5 O OD6,O3/6 VDD WATCHDOG Out. Low level indicates that the WATCHDOG Timer has reached its time-out period without being retriggered. The output type and an optional pull-up are configurable. Signal Pin/s I/O Buffer Type Power Well Description XRD 5 O O3/6 VDD Read. Active (low) level indicates read cycle on the X-Bus Extension. XWR 4 O O3/6 VDD Write. Active (low) level indicates write cycle on the X-Bus Extension. XIORD 83, 71 O O3/6 VDD I/O Read. Active (low) level indicates I/O read cycle on the X-Bus Extension. This signal is for devices that require separate read/write inputs for memory and I/O. |
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