PC87393F datasheet(69/148 Pages) NSC

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2.0 Device Architecture and Configuration (Continued)

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2.19.8

X-Bus Memory Configuration Register

This register is reset by hardware to 00h.

Location:

Index F4h

Type:

R/W

2.19.9

X-Bus Memory Base Address High Byte Register

This register describes the high byte for the user-defined memory zone mapped to the X-Bus (decoded as bits 31 to 24 of

the 32-bit address range, bits 15-0 are 0). This register is reset by hardware to 00h.

Location:

Index F5h

Type:

R/W

Bit

76543210

Name

BIOS FWH ID

BIOS FWH

Enable

User-

Defined

Memory

Space

Enable

BIOS

Extended

Space

Enable

BIOS LPC

Enable

Reset

0000

Depends on strap setting.

Bit

Description

7-4

BIOS FWH ID. The identiﬁcation nibble that is part of a FWH transaction (see Section 2.8.1 for details), which

identiﬁes the device addressed.

BIOS FWH Enable. When set, enables PC8739x response to LPC-FWH transactions to the BIOS-FWH space,

if the BIOS FWH ID matches the ID of the transaction.. The reset value of this register is deﬁned by the XCNF2-

0 conﬁguration inputs. The value of this bit is later updated, based on the detected host BIOS scheme, see

Section 2.19.3 for details.

0: Disabled (default when XCNF disable BIOS conﬁguration)

1: Enabled (default when XCNF enable BIOS conﬁguration)

User-Defined Memory Space Enable. When set, enables the PC8739x to respond to LPC memory read and

write accesses in the user-deﬁned memory area range. The base address and size of the user-deﬁned range is

speciﬁed by X-Bus Memory Base Address High and Low Byte registers and the X-Bus Memory Size

Conﬁguration register.

0: Disabled (default)

1: Enabled

BIOS Extended Space Enable. Expands the BIOS address space to which the PC8739x responds to include

the Extended BIOS address range.

0: Disabled (default)

1: Enabled

BIOS LPC Enable. Enables the PC8739x to respond to LPC memory accesses to the BIOS-LPC space. The

reset value of this register is deﬁned by the XCNF2-0 conﬁguration inputs. The value of this bit is later updated,

based on the detected host BIOS scheme (see Section 2.19.3 for details).

0: Disabled (default when XCNF disable BIOS conﬁguration)

1: Enabled (default when XCNF enable BIOS conﬁguration)

Bit

76543210

Name

User-Defined Memory Zone Address High

Reset

00000000

Bit

Description

7-0

User-Deﬁned Memory Zone Address High. Deﬁnes the higher 8 bits of the user-deﬁned memory block base

address. The base address should be aligned on the selected block size.

PC87393F Datasheet(PDF) 69 Page - National Semiconductor (TI)

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