PC87393F datasheet(112/148 Pages) NSC

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7.0 X-Bus Extension (Continued)

112

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7.4

X-BUS CONFIGURATION REGISTERS

The following abbreviations are used to indicate the Register Type:

R/W = Read/Write

R = Read from a speciﬁc address returns the value of a speciﬁc register. Write to the same address is to a different

W=Write

RO = Read Only

R/W1C = Read/Write 1 to Clear. Writing 1 to a bit clears it to 0. Writing 0 has no effect.

7.4.1

X-Bus Register Map

The following table lists the X-Bus registers.

7.4.2

X-Bus Configuration Register (XBCNF)

This register affects the functionality mode of the X-Bus.

Location:

Offset 00h

Type:

R/W

Offset

Mnemonic

Type

Section

00h

XBCNF

X-Bus Conﬁguration

R/W

7.4.2

01h

XZCNF0

X-Bus Select 0 Conﬁguration

R/W

7.4.3

02h

XZCNF1

X-Bus Select 1 Conﬁguration

R/W

7.4.4

03h

Reserved exclusively for National use

04h

XIRQCA

X-Bus IRQ A Conﬁguration

R/W

7.4.5

05h

XIRQCB

X-Bus IRQ B Conﬁguration

R/W

7.4.5

06h

XIRQCC

X-Bus IRQ C Conﬁguration

R/W

7.4.5

07h

XIRQCD

X-Bus IRQ D Conﬁguration

R/W

7.4.5

08h

XIMA0

X-Bus Indirect Memory Address Register 0

R/W

7.4.6

09h

XIMA1

X-Bus Indirect Memory Address Register 1

R/W

7.4.7

0Ah

XIMA2

X-Bus Indirect Memory Address Register 2

R/W

7.4.8

0Bh

XIMA3

X-Bus Indirect Memory Address Register 3

R/W

7.4.9

0Ch

XIMD

X-Bus Indirect Memory Data Register

R/W

7.4.10

Bit

76543210

Name

Reserved

R/W

Extended

Mode

Enable

Latch

Address

Mode

Enable

Reset

0000000

Strap

PC87393F Datasheet(PDF) 112 Page - National Semiconductor (TI)

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