PC87591L datasheet(256/437 Pages) NSC

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Embedded Controller Modules (Continued)

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TAP Controller Operation

The TAP controller changes state only in response to the following events:

●

A rising edge of TCK

●

Power-up

The TAP controller generates signals to control the operation of the TAP registers and associated PC87591x reset, ISE in-

terrupt control and data link circuitry.

The TDO output buffer and the circuitry that selects the register output fed to TDO are controlled as shown in Table 37.

Changes at TDO, as defined in Table 37, occur on the falling edge of TCK after entry into the state.

Table 37. TAP Operation in Each Controller State

TAP Controller Initialization

Circuitry built into the PC87591x forces the TAP controller into TAP-Reset state at power-up in an asynchronous manner.

The TAP controller must not be initialized by operation of any system input, such as a system reset.

When TMS is equal to 1 for five consecutive TCK cycles, this forces the controller into TAP-Reset state from any state.

4.19.6 TAP Instruction Register

The Instruction Register (IR) allows an instruction to be shifted into the Debugger interface. The instruction selects the mode

of operation, the data register to be addressed or both.

In any serial scan operation, the JTAG serial bus controller transmits and receive vectors of the same length. This serial

scan chain property is used to transmit status bits from the device to the bus controller in any instruction scan operation. The

Instruction register in the PC87591x allows status information generated within the data links to be examined and supports

flash programing, as shown in Table 38 on page 257.

Design and Construction

The IR uses a shift register-based design with a parallel input for register cells other than the two nearest to the serial output.

An instruction, shifted into the register, is latched at the completion of the shifting process.

The IR includes 12 shift register-based cells capable of holding instruction data.

An instruction that is shifted into the register is latched so that the related changes occur only in the Update IR and TAP-

Reset states.

Controller State

TDO Driver Level

Tap-Reset

Undeﬁned

Inactive

Run-Test-Idle

Undeﬁned

Inactive

Select-DR-Scan

Undeﬁned

Inactive

Select-IR-Scan

Undeﬁned

Inactive

Capture-IR

Undeﬁned

Inactive

Shift-IR

Instruction

Active

Exit1-IR

Undeﬁned

Inactive

Pause-IR

Undeﬁned

Inactive

Exit2-IR

Undeﬁned

Inactive

Update-IR

Undeﬁned

Inactive

Capture-DR

Undeﬁned

Inactive

Shift-DR

Test Data

Active

Exit-DR

Undeﬁned

Inactive

Pause-DR

Undeﬁned

Inactive

Exit2-DR

Undeﬁned

Inactive

Update-DR

Undeﬁned

Inactive

PC87591L Datasheet(PDF) 256 Page - National Semiconductor (TI)

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