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AR0141CS Datasheet(PDF) 42 Page - ON Semiconductor |
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AR0141CS Datasheet(HTML) 42 Page - ON Semiconductor |
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42 / 64 page ![]() AR0141CS/D Rev. 6, 4/16 EN 42 ©Semiconductor Components Industries, LLC, 2016. AR0141CS: 1/4-Inch Digital Image Sensor Two-Wire Serial Register Interface Single READ from Random Location This sequence (Figure 34) starts with a dummy WRITE to the 16-bit address that is to be used for the READ. The master terminates the WRITE by generating a restart condition. The master then sends the 8-bit read slave address/data direction byte and clocks out one byte of register data. The master terminates the READ by generating a no-acknowl- edge bit followed by a stop condition. Figure 34 shows how the internal register address maintained by the AR0141CS is loaded and incremented as the sequence proceeds. Figure 34: Single READ from Random Location Single READ from Current Location This sequence (Figure 35) performs a read using the current value of the AR0141CS internal register address. The master terminates the READ by generating a no-acknowl- edge bit followed by a stop condition. The figure shows two independent READ sequences. Figure 35: Single READ from Current Location S = start condition P = stop condition Sr = restart condition A = acknowledge A = no-acknowledge slave to master master to slave Slave Address 0 S A Reg Address[15:8] A Reg Address[7:0] Slave Address A A 1 Sr Read Data P Previous Reg Address, N Reg Address, M M+1 A Slave Address 1 S A Read Data Slave Address A 1 S P Read Data P Previous Reg Address, N Reg Address, N+1 N+2 A A |
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