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AR0141CS Datasheet(PDF) 43 Page - ON Semiconductor

Part # AR0141CS
Description  1/4-Inch Digital Image Sensor
PDF  64 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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AR0141CS Datasheet(HTML) 43 Page - ON Semiconductor

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AR0141CS/D Rev. 6, 4/16 EN
43
©Semiconductor Components Industries, LLC, 2016.
AR0141CS: 1/4-Inch Digital Image Sensor
Two-Wire Serial Register Interface
Sequential READ, Start from Random Location
This sequence (Figure 36) starts in the same way as the single READ from random loca-
tion (Figure 34). Instead of generating a no-acknowledge bit after the first byte of data
has been transferred, the master generates an acknowledge bit and continues to
perform byte READs until “L” bytes have been read.
Figure 36:
Sequential READ, Start from Random Location
Sequential READ, Start from Current Location
This sequence (Figure 37) starts in the same way as the single READ from current loca-
tion (Figure 35). Instead of generating a no-acknowledge bit after the first byte of data
has been transferred, the master generates an acknowledge bit and continues to
perform byte READs until “L” bytes have been read.
Figure 37:
Sequential READ, Start from Current Location
Single WRITE to Random Location
This sequence (Figure 38) begins with the master generating a start condition. The slave
address/data direction byte signals a WRITE and is followed by the HIGH then LOW
bytes of the register address that is to be written. The master follows this with the byte of
write data. The WRITE is terminated by the master generating a stop condition.
Figure 38:
Single WRITE to Random Location
Slave Address
0
S
Sr
A Reg Address[15:8]
Read Data
Read Data
A
Reg Address[7:0] A
Read Data
Slave Address
Previous Reg Address, N
Reg Address, M
M+1
M+2
M+1
M+3
A
1
Read Data
Read Data
M+L-2
M+L-1
M+L
A P
A
A
A
A
Read Data
Read Data
Previous Reg Address, N
N+1
N+2
N+L-1
N+L
Read Data
Slave Address
A
1
Read Data
A P
S
A
A
A
Slave Address
0
S
A Reg Address[15:8]
A
Reg Address[7:0]
A
P
Previous Reg Address, N
Reg Address, M
M+1
A
A
Write Data



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