DS2155 datasheet(155/262 Pages) DALLAS

155 / 262 page

DS2156

155 of 262

LIC3

Line Interface Control 3

7Ah

Bit #

Name

—

TCES

RCES

MM1

MM0

RSCLKE TSCLKE

TAOZ

Default

Bit 0/Transmit Alternate Ones and Zeros (TAOZ). Transmit a …101010… pattern (customer disconnect

indication signal) at TTIP and TRING. The transmission of this data pattern is always timed off of TCLK.

0 = disabled

1 = enabled

Bit 1/Transmit Synchronization G.703 Clock Enable (TSCLKE)

0 = disable 1.544MHz (T1)/2.048MHz (E1) transmit synchronization clock

1 = enable 1.544MHz (T1)/2.048MHz (E1) transmit synchronization clock

Bit 2/Receive Synchronization G.703 Clock Enable (RSCLKE)

0 = disable 1.544MHz (T1)/2.048MHz (E1) synchronization receive mode

1 = enable 1.544MHz (T1)/2.048MHz (E1) synchronization receive mode

Bits 3 to 4/Monitor Mode (MM0 to MM1)

MM1

MM0

Internal Linear Gain Boost

(dB)

Normal operation (no boost)

Bit 5/Receive-Clock Edge Select (RCES). Selects which RCLKO edge to update RPOSO and RNEGO.

0 = update RPOSO and RNEGO on rising edge of RCLKO

1 = update RPOSO and RNEGO on falling edge of RCLKO

Bit 6/Transmit-Clock Edge Select (TCES). Selects which TCLKI edge to sample TPOSI and TNEGI.

0 = sample TPOSI and TNEGI on falling edge of TCLKI

1 = sample TPOSI and TNEGI on rising edge of TCLKI

Bit 7/Unused, must be set to 0 for proper operation

DS2155 Datasheet(PDF) 155 Page - Dallas Semiconductor