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PM5344 Datasheet(PDF) 45 Page - PMC-Sierra, Inc

Part # PM5344
Description  SONET/SDH PATH TERMINATING TRANSCEIVER TELECOM
PDF  212 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5344 Datasheet(HTML) 45 Page - PMC-Sierra, Inc

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PM5344 SPTX
DATA SHEET
PMC-930531
ISSUE 6
SONET/SDH PATH TERMINATING TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
31
Output RPOHFP is provided to identify the most significant bit of the path trace
byte (J1) on RPOH. The path overhead clock, RPOHCK is nominally a 576 kHz
clock. RPOH and RPOHFP are updated with timing aligned to RPOHCLK.
9.1.6 Tandem Connection Originate
The Tandem Connection Originate block updates the path BIP byte (B3) and the
tandem connection maintenance byte (Z5) on the DROP bus when RPOP
originates a tandem connection. Incoming BIP-8 errors are counted and
encoded in the incoming error count field of the Z5 byte. The tandem connection
data link is placed into the data link field of the Z5 byte. The B3 byte is updated
to reflect the changes made to the Z5 byte. When LOP or path AIS alarms are
declared, the incoming error count field of the Z5 byte is set to indicate incoming
signal failure (ISF = 'b1111). The H1, H2 pointer bytes are frozen to the previous
active offset. Path overhead and payload bytes are set to all ones. The tandem
connection data link remains active and the path BIP-8 byte remains valid.
9.1.7 Receive Alarm Port
Received path BIP errors and defect indications (RDI) are communicated to the
transmit path overhead processor (TPOP) in a remote SPTX via the receive
alarm port. The port carries the count of received path BIP errors. Insertion of
path AIS in the DROP bus is reported in the alarm port and will trigger the
remote TPOP to signal path FERF in the transmit stream.
9.2
Receive Path Trace Buffer
The receive portion of the SONET Path Trace Buffer (SPTB) captures the
received path trace identifier message (J1 bytes) into microprocessor readable
registers. It contains two pages of trace message memory. One is designated
the capture page and the other the expected page. Path trace identifier data
bytes from the receive stream are written into the capture page. The expected
identifier message is downloaded by the microprocessor into the expected page.
On receipt of a trace identifier byte, it is written into next location in the capture
page. The received byte is compared with the data from the previous message in
the capture page. An identifier message is accepted if it is received unchanged
three times, or optionally, five times. The accepted message is then compared
with the expected message. If enabled, an interrupt is generated when the
accepted message changes from matching to mismatching the expected
message and vice versa. If the current message differs from the previous
message the unstable counter is incremented by one. When the unstable count
reaches eight, the received message is declared unstable. The received
message is declared stable and the unstable counter reset, when the received



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