Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

PM5344 Datasheet(PDF) 96 Page - PMC-Sierra, Inc

Part # PM5344
Description  SONET/SDH PATH TERMINATING TRANSCEIVER TELECOM
PDF  212 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5344 Datasheet(HTML) 96 Page - PMC-Sierra, Inc

Back Button PM5344 Datasheet HTML 92Page - PMC-Sierra, Inc PM5344 Datasheet HTML 93Page - PMC-Sierra, Inc PM5344 Datasheet HTML 94Page - PMC-Sierra, Inc PM5344 Datasheet HTML 95Page - PMC-Sierra, Inc PM5344 Datasheet HTML 96Page - PMC-Sierra, Inc PM5344 Datasheet HTML 97Page - PMC-Sierra, Inc PM5344 Datasheet HTML 98Page - PMC-Sierra, Inc PM5344 Datasheet HTML 99Page - PMC-Sierra, Inc PM5344 Datasheet HTML 100Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 96 / 212 page
background image
PM5344 SPTX
DATA SHEET
PMC-930531
ISSUE 6
SONET/SDH PATH TERMINATING TRANSCEIVER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
82
Register 25H, 65H, A5H: PMON Receive Negative Pointer Justification
Count
Bit
Type
Function
Default
Bit 7
R
RNJE[7]
X
Bit 6
R
RNJE[6]
X
Bit 5
R
RNJE[5]
X
Bit 4
R
RNJE[4]
X
Bit 3
R
RNJE[3]
X
Bit 2
R
RNJE[2]
X
Bit 1
R
RNJE[1]
X
Bit 0
R
RNJE[0]
X
This register reports the number of negative pointer justification events that
occurred on the receive side in the previous accumulation interval. The counter
is selectable to accumulate negative pointer justifications in the receive stream
when the MONRS bit in the SPTX Master Configuration register is set high, and
to accumulate justifications on the DROP bus when MONRS is set low.
RNJE0 - RNJE7:
Bits RNJE0 through RNJE7 represent the number of negative pointer
justification events observed on the receive side since the RNJE register was
polled by writing to SPTX Accumulation Trigger register. The write access
transfers the internally accumulated error count to the RNJE register within
twelve PICLK cycles (or ~ 1 µs) and simultaneously resets the internal
counter to begin a new cycle of error accumulation.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com