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PM5344 Datasheet(PDF) 67 Page - PMC-Sierra, Inc |
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PM5344 Datasheet(HTML) 67 Page - PMC-Sierra, Inc |
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67 / 212 page ![]() PM5344 SPTX DATA SHEET PMC-930531 ISSUE 6 SONET/SDH PATH TERMINATING TRANSCEIVER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 53 Register 04H: SPTX Master Interrupt Status #1 Bit Type Function Default Bit 7 R DPAIS X Bit 6 Unused X Bit 5 R RPOP3I 0 Bit 4 R RPOP2I 0 Bit 3 R RPOP1I 0 Bit 2 R RTAL3I 0 Bit 1 R RTAL2I 0 Bit 0 R RTAL1I 0 This register, together with the SPTX Master Interrupt Status #2 register, allow the source of an active interrupt to be identified down to the block level. Further register accesses to the block in question are required in order to determine each specific cause of an active interrupt and to acknowledge each interrupt source. RTALnI: The RTALnI bits are high when an interrupt request is active from the corresponding RTAL block. RPOPnI: The RPOPnI bits are high when an interrupt request is active from the corresponding RPOP block. DPAIS: The DROP bus alarm indiction signal (DPAIS) bit is set high when path AIS is inserted in the DROP bus. In STS-3 mode, DPAIS is set high when AIS is inserted in any of the three STS-1 streams These register bits are not cleared on read. |
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