PM5344 datasheet(71/212 Pages) PMC

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PM5344 SPTX

DATA SHEET

PMC-930531

ISSUE 6

SONET/SDH PATH TERMINATING TRANSCEIVER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

Bit

Type

Function

Default

Bit 7

PINA

Bit 6

IFPA/RCA

Bit 5

ADA

Bit 4

ACA

Bit 3

TCKA

Bit 2

PICLKA

Bit 1

DCKA

Bit 0

ACKA

This register provides activity monitoring on major SPTX inputs. When a

monitored input makes a low to high transition, the corresponding register bit is

set high. The bit will remain high until this register is read, at which point, all the

bits in this register are cleared. A lack of transitions is indicated by the

corresponding register bit reading low. This register should be read periodically

to detect stuck at conditions.

Writing to this register delimits accumulation intervals in the PMON and RPOP

accumulation registers. Counts accumulated in those registers are transferred to

holding registers where they can be read. The counters themselves are then

cleared to begin accumulating the associated events for the new accumulation

interval. The bits in this register are not affected by write accesses.

ACKA:

The ACK active (ACKA) bit monitors for low to high transitions on the ACK

input. ACKA is set high on a rising edge of ACK, and is set low when this

DCKA:

The DCK active (DCKA) bit monitors for low to high transitions on the DCK

input. DCKA is set high on a rising edge of DCK, and is set low when this

PM5344 Datasheet(PDF) 71 Page - PMC-Sierra, Inc

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