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PM5345 Datasheet(PDF) 41 Page - PMC-Sierra, Inc |
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PM5345 Datasheet(HTML) 41 Page - PMC-Sierra, Inc |
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41 / 196 page ![]() PM5345 S/UNI-155 DATA SHEET PMC-930305 ISSUE 4 SATURN USER NETWORK INTERFACE PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE 27 Pin Name Type Pin No. Function TCLK I/O 7 The transmit clock (TCLK) provides timing for S/UNI transmit function operation when the byte serial interface is selected (TSER is tied low). TCLK must be a 19.44 MHz, nominally 50% duty cycle clock. POCLK is a buffered version of TCLK when byte serial interface is selected. When the 155 Mbit/s serial interface is selected (TSER is tied high), TCLK becomes an output and should not be driven. TX_VCLK The test vector clock (TX_VCLK) signal is used during S/UNI production testing to verify internal functionality. TFP Input 27 The active high transmit frame pulse (TFP) signal is used to align the SONET/SDH transport frame generated by the S/UNI device to a system reference when the byte serial interface is selected (TSER is low). TFP should be brought high for a single TCLK period every 2430 TCLK cycles or a multiple thereof. TFP may be tied low if such synchronization is not required. The offset between an active TFP input and the resultant FPOUT pulse is 24 TCLK periods. TFP is sampled on the rising edge of TCLK. TWRB Input 58 The transmit write strobe (TWRB) is used to write ATM cells to the four cell transmit FIFO. When active, TWRB cycles at a 25 MHz or lower instantaneous rate. A complete 53 octet cell must be written to the FIFO before being inserted in the STS-3c (STM-1) SPE. Idle/unassigned cells are inserted when a complete cell is not available. TDAT[15:0] and TSOC are sampled on the rising edge of TWRB. |
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