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PM5345 Datasheet(PDF) 71 Page - PMC-Sierra, Inc

Part # PM5345
Description  SATURN USER NETWORK INTERFACE TELECOM STANDARD PRODUCT
PDF  196 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM5345 Datasheet(HTML) 71 Page - PMC-Sierra, Inc

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PM5345 S/UNI-155
DATA SHEET
PMC-930305
ISSUE 4
SATURN USER NETWORK INTERFACE
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
57
When operating with the byte interleaved demultiplexer, the receive interface
processes an STS-3c/STM-1 streams which has been demultiplexed from a
higher rate stream such as an STS-12/STM-4. In this case, the frame alignment
is known, and the demultiplexer indicates the frame alignment by providing an
appropriate pulse on the FPIN input.
10.15.2
Transmit Interface
The low speed transmit interface is a generic byte wide interface for
interconnection with a downstream parallel to serial converter, or a downstream
byte interleaved multiplexer.
When operating with the parallel to serial converter, the transmit interface
provides scrambled data and a 19.44 MHz clock.
When operating with the byte interleaved multiplexer, the transmit interface
provides an STS-3c/STM-1 stream which is multiplexed to a higher rate stream
such as an STS-12/STM-4. In this case, the transmit interface provides
unscrambled data and a 19.44 MHz clock.
10.16 Drop Side Interface
10.16.1
Receive Interface
The drop side receive interface can be accessed through a generic 16-bit or 8-bit
wide interface.
External circuitry is notified, using the RCA signal, when a cell is available in the
receive FIFO. External circuitry may then read the cell from the buffer as a word
wide stream (along with a bit marking the first word of the cell) at instantaneous
rates of up to 25 MHz.
Two cell data structure options are supported as described in the Receive ATM
Cell Processor block description above.
10.16.2
Transmit Interface
The drop side transmit interface can be accessed through a generic 16-bit or 8-
bit wide interface.
External circuitry is notified, using the TCA signal, when a cell may be written to
the transmit FIFO. The cell is written to the FIFO as a word wide stream (along



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