LAN89218 datasheet(128/148 Pages) MICROCHIP

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LAN89218

DS60001255B-page 128

 2008-2015 Microchip Technology Inc.

6.5

RX Data FIFO Direct PIO Burst Reads

In this mode the upper address inputs are not decoded, and any burst read of the LAN89218 will read the RX Data

FIFO. This mode is enabled when FIFO_SEL is driven high during a read access. This is normally accomplished by

connecting the FIFO_SEL signal to a high-order address line. This mode is useful when the host processor must

increment its address when accessing the LAN89218. Timing is identical to a PIO Burst Read, and the FIFO_SEL

signal has the same timing characteristics as the address lines. This mode improves performance by allowing an

unlimited number of back-to-back read cycles. RX Data FIFO Direct PIO Burst Reads can be performed using Chip

Select (nCS) or Read Enable (nRD). When either or both of these control signals go high, they must remain high for

the period specified.

Timing for 16-bit and 32-bit RX Data FIFO Direct PIO Burst Reads is identical with the exception that D[31:16] are

not driven during a 16-bit burst. Note that address lines A[2:1] are still used, and address bits A[7:3] are ignored.

FIGURE 6-4:

RX DATA FIFO DIRECT PIO BURST READ CYCLE TIMING

Note:

The “Data Bus” width is 32 bits with optional support for 16-bit bus widths.

TABLE 6-6:

RX DATA FIFO DIRECT PIO BURST READ CYCLE TIMING

Symbol

Description

Min.

Typ.

Max.

Unit

tcsh

nCS, nRD Deassertion Time

tcsdv

nCS, nRD Valid to Data Valid

tacyc

Address Cycle Time

tasu

Address, END_SEL, FIFO_SEL Setup to nCS, nRD Valid

tadv

Address Stable to Data Valid

tah

Address, END_SEL, FIFO_SEL Hold Time

tdon

Data Buffer Turn On Time

tdoff

Data Buffer Turn Off Time

tdoh

Data Output Hold Time

Note:

An RX Data FIFO Direct PIO Burst Read cycle begins when both nCS and nRD are asserted. The cycle

ends when either or both nCS and nRD are deasserted. They may be asserted and deasserted in any

order.

A[2:1]

nCS, nRD

Data Bus

END_SEL

FIFO_SEL

tasu

tacyc

tadv

tcsdv

tdon

tacyc

tcsh

tadv

tah

tdoh

tdoff

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