LAN89218 datasheet(129/148 Pages) MICROCHIP

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DS60001255B-page 129

LAN89218

6.6

PIO Writes

PIO writes are used for all LAN89218 write cycles. PIO writes can be performed using Chip Select (nCS) or Write

Enable (nWR). Either or both of these control signals must go high between cycles for the period specified.

PIO Writes are valid for 16- and 32-bit access. Timing for 16-bit and 32-bit PIO write cycles are identical with the

exception that D[31:16] are ignored during a 16-bit write.

FIGURE 6-5:

PIO WRITE CYCLE TIMING

Note:

The “Data Bus” width is 32 bits with optional support for 16-bit bus widths.

TABLE 6-7:

PIO WRITE CYCLE TIMING

Symbol

Description

Min.

Typ.

Max.

Unit

tcycle

Write Cycle Time

tcsl

nCS, nWR Assertion Time

tcsh

nCS, nWR Deassertion Time

tasu

Address, END_SEL Setup to nCS, nWR Assertion

tah

Address, END_SEL Hold Time

tdsu

Data Setup to nCS, nWR Deassertion

tdh

Data Hold Time

Note:

A PIO Write cycle begins when both nCS and nWR are asserted. The cycle ends when either or both nCS

and nWR are deasserted. They may be asserted and deasserted in any order.

tah

A[7:1], END_SEL

nCS, nWR

Data Bus

tasu

tcsl

tcycle

tcsh

tdh

tdsu

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