LAN89218 datasheet(137/148 Pages) MICROCHIP

137 / 148 page

 2008-2015 Microchip Technology Inc.

DS60001255B-page 137

LAN89218

7.7

Clock Circuit

The LAN89218 can accept either a 25 MHz crystal (preferred) or a 25 MHz single-ended clock oscillator (

50 PPM)

input. The LAN89218 shares the 25 MHz clock oscillator input (CLKIN) with the crystal input XTAL1/CLKIN. If the

single-ended clock oscillator method is implemented, XTAL2 should be left unconnected and CLKIN should be driven

with a nominal 0-3.3 V clock signal. The input clock duty cycle is 40% minimum, 50% typical and 60% maximum.

It is recommended that a crystal utilizing matching parallel load capacitors be used for the LAN89218 crystal input/

output signals (XTAL1, XTAL2). See Table 7-8 for crystal specifications. Refer to application note AN10.7 - “Parallel

Crystal Circuit Input Voltage Control” for additional information.

Note 1:

The maximum allowable values for Frequency Tolerance and Frequency Stability are application depen-

dent. Since any particular application must meet the IEEE

50 PPM Total PPM Budget, the combination of

these two values must be approximately

45 PPM (allowing for aging).

Note 2:

Frequency Deviation Over Time is also referred to as Aging.

Note 3:

The total deviation for the Transmitter Clock Frequency is specified by IEEE 802.3u as

50 PPM.

Note 4:

This number includes the pad, the bond wire and the lead frame. PCB capacitance is not included in this

value. The XTAL1/CLKIN and XTAL2 pin and PCB capacitance values are required to accurately calculate

the value of the two external load capacitors. These two external load capacitors determine the accuracy of

the 25.000 MHz frequency.

TABLE 7-8:

LAN89218 CRYSTAL SPECIFICATIONS

Parameter

Symbol

Min.

Typ.

Max.

Unit

Note

Crystal Cut

AT, typ

Crystal Oscillation Mode

Fundamental Mode

Crystal Calibration Mode

Parallel Resonant Mode

Frequency

Ffund

25.000

MHz

Frequency Tolerance @ 25 oCFtol

50

PPM

See Note 1

Frequency Stability Over Temp

Ftemp

50

PPM

See Note 1

Frequency Deviation Over Time

Fage

3 to 5

PPM

See Note 2

Total Allowable PPM Budget

50

PPM

See Note 3

Shunt Capacitance

7 typ

Load Capacitance

20 typ

Drive Level

300

µW

Equivalent Series Resistance

Ω

Operating Temperature Range

-40

+85

LAN89218 XTAL1/CLKIN Pin

Capacitance

3 typ

See Note 4

LAN89218 XTAL2 Pin Capaci-

tance

3 typ

See Note 4

LAN89218 Datasheet(PDF) 137 Page - Microchip Technology

LAN89218 Datasheet(HTML) 137 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL