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AD7761BSTZ Datasheet(PDF) 14 Page - Analog Devices |
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AD7761BSTZ Datasheet(HTML) 14 Page - Analog Devices |
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14 / 76 page ![]() Data Sheet AD7761 Rev. A | Page 13 of 75 Timing Diagrams DRDY DCLK D23 DOUTx t1 tODR = 1/ODR t7 t6 t5 t4 t3 t2 t8 t9 Figure 2. Data Interface Timing Diagram t8a t8b t9a MCLK DCLK = MCLK/2 DCLK = MCLK/4 DCLK = MCLK/8 t10 t9b t8c t9c Figure 3. MCLK to DCLK Divider Timing Diagram t11 tODR t12 DRDY DCLK DOUT6 AND DOUT7 Figure 4. Daisy-Chain Setup and Hold Timing Diagram t13 t14 MCLK START SYNC_OUT Figure 5. Asynchronous START and SYNC_OUT Timing Diagram |
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