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AD7761BSTZ Datasheet(PDF) 20 Page - Analog Devices

Part # AD7761BSTZ
Description  8-Channel, 16-Bit, Simultaneous Sampling ADC with Power Scaling, 110.8 kHz BW
PDF  76 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7761BSTZ Datasheet(HTML) 20 Page - Analog Devices

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Data Sheet
AD7761
Rev. A | Page 19 of 75
Pin No.
Mnemonic
Type1
Description
55, 56
FORMAT1,
FORMAT0
DI
Format Selection Pins. Hardwire the FORMATx pins to the required values in pin control and SPI
control mode. These pins set the number of DOUTx pins used to output ADC conversion data. The
FORMATx pins are checked by the AD7761 on power-up; the AD7761 then remains in this data
output configuration.
57
PIN/SPI
DI
Pin Control/SPI Control. This pin sets the control method.
Logic 0 = pin control mode for the AD7761. Pin control mode allows pin strapped configuration
of the AD7761 by tying logic input pins to the required logic levels. Tie the logic pins (MODE0 to
MODE4, DEC0 and DEC1, and FILTER) as required for the configuration.
Logic 1 = SPI control mode for the AD7761. Use the SPI control interface signals (CS, SCLK, SDI,
and SDO) for reading and writing to the AD7761 memory map.
58
CLK_SEL
DI
Clock Select.
0 = pull this pin low for the CMOS clock option. The clock is applied to Pin 32 (connect Pin 31 to
DGND).
1 = pull this pin high for the crystal or LVDS clock option. The crystal or LVDS clock is applied to
Pin 31 and Pin 32. The LVDS option is available only in SPI control mode. A write is required to
enable the LVDS clock option.
59
VCM
AO
Common-Mode Voltage Output. This pin outputs (AVDD1 − AVSS)/2, which is 2.5 V by default in
pin control mode. Configure this pin to (AVDD1 − AVSS)/2, 2.5 V, 2.14 V, or 1.65 V in SPI control
mode. When driving capacitive loads larger than 0.1 µF, it is recommended to place a 50 Ω series
resistor between this pin and the capacitive load for stability.
60
AVDD2A
P
Analog Supply Voltage. This pin is 2 V to 5.5 V with respect to AVSS.
61
REGCAPA
AO
Analog LDO Regulator Output. Decouple this pin to AVSS with a 1 µF capacitor.
62
AVSS2A
P
Negative Analog Supply. This pin is nominally 0 V.
63
AIN0−
AI
Negative Analog Input to ADC Channel 0.
64
AIN0+
AI
Positive Analog Input to ADC Channel 0.
1
AI is analog input, P is power, DI/O is digital input/output, DI is digital input, DO is digital output, and AO is analog output.



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