AD7761BSTZ datasheet(17/76 Pages) AD

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AD7761

Data Sheet

Rev. A | Page 16 of 75

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

64 63

62 61 60 59 58 57 56 55 54 53 52

51 50 49

AIN5+

AVSS1B

AVDD1B

AIN6–

REF2+

REF2–

AIN5–

AIN6+

AIN7–

AIN7+

START

SYNC_IN

IOVDD

DREGCAP

DGND

SYNC_OUT

AIN1+

AVSS1A

AVDD1A

AIN2–

REF1+

REF1–

AIN1–

AIN2+

AIN3–

AIN3+

MODE0/GPIO0

MODE1/GPIO1

MODE2/GPIO2

MODE3/GPIO3

ST0/CS

FILTER/GPIO4

17 18 19

20 21 22 23 24 25 26 27 28 29 30 31 32

AD7761

TOP VIEW

(Not to Scale)

Figure 10. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Type1

Description

AIN1−

Negative Analog Input to ADC Channel 1.

AIN1+

Positive Analog Input to ADC Channel 1.

AVSS1A

Negative Analog Supply. This pin is nominally 0 V.

AVDD1A

Analog Supply Voltage, 5 V ± 10% with Respect to AVSS.

REF1−

Reference Input Negative. REF1− is the negative reference terminal for Channel 0 to Channel 3. The

REF1− voltage range is from AVSS to (AVDD1 − 1 V). Decouple this pin to AVSS with a high quality

capacitor, and maintain a low impedance between this capacitor and Pin 3.

REF1+

Reference Input Positive. REF1+ is the positive reference terminal for Channel 0 to Channel 3.

The REF1+ voltage range is from (AVSS + 1 V) to AVDD1. Apply an external reference differential

between REF1+ and REF1− in the range from 1 V to |AVDD1 − AVSS|. Decouple this pin to AVSS

with a high quality capacitor, and maintain a low impedance between this capacitor and Pin 3.

AIN2−

Negative Analog Input to ADC Channel 2.

AIN2+

Positive Analog Input to ADC Channel 2.

AIN3−

Negative Analog Input to ADC Channel 3.

AIN3+

Positive Analog Input to ADC Channel 3.

FILTER/GPIO4

DI/O

Filter Select/General-Purpose Input/Output 4. In pin control mode, this pin selects the filter type.

Set this pin to Logic 1 for the sinc5 filter. This sinc5 filter is a low latency filter, and is best for dc

applications or when a user has specialized postfiltering implemented off chip.

Set this pin to Logic 0 for the wideband low ripple filter response. This filter has a steep

transition band and 105 dB stop band attenuation. Full attenuation at Nyquist (ODR/2) means

that no aliasing occurs at ODR/2 out to the first chopping zone.

In SPI control mode, this pin can be used as a general-purpose input/output (GPIO4). For further

information on GPIO configuration, see the GPIO Functionality section.

In SPI control mode, when not used as a GPIO pin, and when using a crystal as the clock source,

this pin must be set to 1.

AD7761BSTZ Datasheet(PDF) 17 Page - Analog Devices

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