| Electronic Components Datasheet Search |
|
LTM2887 Datasheet(PDF) 23 Page - Linear Technology |
|
|
|||||||||||||||||||||||||||||
LTM2887 Datasheet(HTML) 23 Page - Linear Technology |
|
23 / 38 page ![]() LTM2887 23 2887fb For more information www.linear.com/LTM2887 The isolated side bidirectional serial data pin, SDA2, simplified schematic is shown in Figure 11. An internal 1.8mA current source provides a pull-up for SDA2. Do not connect any other pull-up device to SDA2. This current source is sufficient to satisfy the system requirements for bus capacitances greater than 200pF in FAST mode and greater than 400pF in STANDARD mode. APPLICATIONS INFORMATION CBUS (pF) 10 30 25 5 10 15 20 0 100 2887 F12 1000 V = 3V V = 3.3V V = 3.6V V = 4.5V TO 5.5V CBUS (pF) 10 10 9 1 3 5 7 2 4 6 8 0 100 2887 F13 1000 V = 3V V = 3.3V V = 3.6V V = 4.5V TO 5.5V Figure 12. Maximum Standard Speed Pull-Up Resistance on SDA Figure 13. Maximum Fast Speed Pull-Up Resistance on SDA Additional proprietary circuitry monitors the slew rate on the SDA and SDA2 signals to manage directional control across the isolation barrier. Slew rates on both pins must be greater than 1V/µs for proper operation. The logic side bidirectional serial data pin, SDA, requires a pull-up resistor or current source connected to VL. Follow the requirements in Figures 12 and 13 for the appropri- ate pull-up resistor on SDA that satisfies the desired rise time specifications and VOL maximum limits for FAST and STANDARD modes. The resistance curves represent the maximum resistance boundary; any value may be used to the left of the appropriate curve. The isolated side clock pin, SCL2, has a weak push-pull output driver; do not connect an external pull-up device. SCL2 is compatible with I2C devices without clock stretch- ing. On lightly loaded connections, a 100pF capacitor form SCL2 to GND2 or RC lowpass filter (R = 500Ω, C = 100pF) can be used to increase the rise and fall times and minimize noise. Some consideration must be given to signal coupling between SCL2 and SDA2. Separate these signals on a printed circuit board or route with ground between. If these signals are wired off board, twist SCL2 with VCC2 and/or GND2 and SDA2 with GND2 and/or VCC2, do not twist SCL2 and SDA2 together. If coupling between SCL2 and SDA2 is unavoidable, place the aforementioned RC filter at the SCL2 pin to reduce noise injection onto SDA2. Figure 11. Isolated SDA2 Pin Schematic 2887 F11 SDA2 1.8mA FROM LOGIC SIDE TO LOGIC SIDE GLITCH FILTER |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |