LTM2887 datasheet(24/38 Pages) LINER

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LTM2887

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For more information www.linear.com/LTM2887

APPLICATIONS INFORMATION

RF, Magnetic Field Immunity

TheisolatorµModuletechnologyusedwithintheLTM2887

hasbeenindependentlyevaluated,andsuccessfullypassed

the RF and magnetic field immunity testing requirements

per European Standard EN 55024, in accordance with the

following test standards:

EN 61000-4-3

Radiated, Radio-Frequency,

Electromagnetic Field Immunity

EN 61000-4-8

Power Frequency Magnetic Field

Immunity

EN 61000-4-9

Pulsed Magnetic Field Immunity

Tests were performed using an unshielded test card de-

signed per the data sheet PCB layout recommendations.

Specific limits per test are detailed in Table 4.

Table 4. EMC Immunity Tests

TEST

FREQUENCY

FIELD STRENGTH

EN 61000-4-3 Annex D

80MHz to 1GHz

10V/m

1.4MHz to 2GHz

3V/m

2GHz to 2.7GHz

1V/m

EN 61000-4-8 Level 4

50Hz and 60Hz

30A/m

EN 61000-4-8 Level 5

60Hz

100A/m*

EN 61000-4-9 Level 5

Pulse

1000A/m

*non IEC method

PCB Layout

The high integration of the LTM2887 makes PCB layout

very simple. However, to optimize its electrical isolation

characteristics, EMI, and thermal performance, some

layout considerations are necessary.

• Under heavily loaded conditions VCC and GND current

can exceed 300mA. Sufficient copper must be used

on the PCB to insure resistive losses do not cause the

supply voltage to drop below the minimum allowed

level. Similarly, the VCC2 and GND2 conductors must

be sized to support any external load current. These

heavy copper traces will also help to reduce thermal

stress and improve the thermal conductivity.

• Inputandoutputdecouplingisnotrequired,sincethese

components are integrated within the package. An ad-

ditional bulk capacitor with a value of 6.8µF to 22µF is

recommended. The high ESR of this capacitor reduces

boardresonancesandminimizesvoltagespikescaused

by hot plugging of the supply voltage. For EMI sensitive

applications,anadditionallowESLceramiccapacitorof

1µF to 4.7µF, placed as close to the power and ground

terminals as possible, is recommended. Alternatively, a

numberofsmallervalueparallelcapacitorsmaybeused

to reduce ESL and achieve the same net capacitance.

• Do not place copper on the PCB between the inner col-

umns of pads. This area must remain open to withstand

the rated isolation voltage.

• The use of solid ground planes for GND and GND2

is recommended for non-EMI critical applications to

optimize signal fidelity, thermal performance, and to

minimize RF emissions due to uncoupled PCB trace

conduction. The drawback of using ground planes,

where EMI is of concern, is the creation of a dipole

antennastructurewhichcanradiatedifferentialvoltages

formed between GND and GND2. If ground planes are

used it is recommended to minimize their area, and

use contiguous planes as any openings or splits can

exacerbate RF emissions.

• For large ground planes a small capacitance (≤330pF)

from GND to GND2, either discrete or embedded within

the substrate, provides a low impedance current return

path for the module parasitic capacitance, minimizing

anyhighfrequencydifferentialvoltagesandsubstantially

reducing radiated emissions. Discrete capacitance will

not be as effective due to parasitic ESL. In addition, volt-

age rating, leakage, and clearance must be considered

for component selection. Embedding the capacitance

within the PCB substrate provides a near ideal capacitor

and eliminates component selection issues; however,

the PCB must be 4 layers. Care must be exercised in

applying either technique to ensure the voltage rating

of the barrier is not compromised.

LTM2887 Datasheet(PDF) 24 Page - Linear Technology

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