LTM2887 datasheet(25/38 Pages) LINER

25 / 38 page

LTM2887

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For more information www.linear.com/LTM2887

APPLICATIONS INFORMATION

Figure 14. LTM2887 Low EMI Demo Board Layout

• In applications without an embedded PCB substrate

capacitance a slot may be added between the logic

side and isolated side device pins. The slot extends

the creepage path between terminals on the PCB side,

and may reduce leakage caused by PCB contamination.

The slot should be placed in the middle of the device

and extend beyond the package perimeter.

The PCB layout in Figures 14 and 15 shows the low EMI

demo board for the LTM2887. The demo board uses a

combination of EMI mitigation techniques, including both

embedded PCB bridge capacitance and discrete GND to

GND2 capacitors. Two safety rated type Y2 capacitors are

used in series, manufactured by MuRata, part number

GA342QR7GF471KW01L. The embedded capacitor ef-

fectively suppresses emissions above 400MHz, whereas

the discrete capacitors are more effective below 400MHz.

EMI performance is shown in Figure 16, measured using

a Gigahertz Transverse Electromagnetic (GTEM) cell and

method detailed in IEC 61000-4-20, Testing and Measure-

ment Techniques – Emission and Immunity Testing in

Transverse Electromagnetic Waveguides.

LTM2887 Datasheet(PDF) 25 Page - Linear Technology