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OXCB950 Datasheet(PDF) 59 Page - List of Unclassifed Manufacturers |
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OXCB950 Datasheet(HTML) 59 Page - List of Unclassifed Manufacturers |
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59 / 68 page ![]() Data Sheet Revision 1.0 PRELIMINARY Page 59 OXCB950 OXFORD SEMICONDUCTOR LTD. Now that the target has signalled that the clock is to be maintained, the target's drive on the CCLKRUN# line must be maintained for 2 clocks during which the host will begin to drive the line also. Since the CCLKRUN# is also the data to the 2-bit shift register then, when the CCLKRUN# is driven by the control circuitry, it will take 2 clock cycles for the new clock run status to propagate through the logic to turn off the transistor. During this period, the host will have detected the assertion of the CCLKRUN# by the target and will also begin to assert the CLKRUN# line, so that when the clock control's transistor is turned off, the CCLKRUN# will be held in the asserted state by the host thereby keeping the transistor off. The transistor will remain off until the host next attempts to negate the CCLKRUN# line to indicate a clock stop and is prevented from doing so by the clock control logic. For the condition when the device driver needs to place the oxcb950 into a low powerstate, and the clock control logic is not required, then the device driver will assign the MIO0 pin to a logic 0 that disables the clock control circuitry and forces the clockrun transistor to the off state. For this condition, when the host negates the CCLKRUN# line it does not see the CCLKRUN# being asserted by the target (as the circuitry has been disabled) and the clock is stopped by the host after the relevant number of clocks from the negation. Since the UART functionality within the oxcb950 device is not dependant upon the CCLK line for interrupt generation, then any activity within the UART that results in an interrupt will be conveyed to the cardbus interface asynchronously. This will result in the CCLKRUN# being asserted by the host (and thus enabling the clock CCLK) and control will be handed to the device driver that will re-enable the clock control circuitry to prevent the clock from stopping until all tasks have been completed. |
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