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OXCB950 Datasheet(PDF) 15 Page - List of Unclassifed Manufacturers |
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OXCB950 Datasheet(HTML) 15 Page - List of Unclassifed Manufacturers |
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15 / 68 page ![]() Data Sheet Revision 1.1 Page 15 OXCB950 OXFORD SEMICONDUCTOR LTD. 6.3 Accessing the UART function Access to the internal UART is achieved via standard I/O and memory mapping, at addresses defined by the Base Address Registers (BARs) in the PCI configuration space. These BARs are configured by the system to allocate blocks of I/O and memory space to this logical function, according to the size required by the function. The base addresses that have been allocated can then be used to access this uart function. The mapping of these BARs is shown in the table below. BAR UART Function 0 Internal UART (I/O Mapped) 1 Internal UART(Memory Mapped) 2 Local configuration registers (I/O Mapped) 3 Local configuration registers (Memory Mapped) 4 Cardbus Status Registers (Memory Mapped) – relevant to cardbus mode only 5 Unused Table 4: Base Address Register definition 6.3.1 Cardbus/PCI access to the internal UART IO and memory space BAR 0 and BAR 1 of function 0 are used to access the internal UART. The function reserves an 8-byte block of I/O space and a 4K byte block of memory space. Once the I/O and/or the Memory access enable bits in the Command register (of the PCI configuration space) are set, the UART can be accessed following the mapping shown in Table 5. UART Address Cardbus/PCI Offset from Base Address 0 for Function0 in IO space (hex) (hex) 0 0 1 1 2 2 3 3 4 4 5 5 6 6 7 7 UART Address Cardbus/PCI Offset from Base Address 1 for Function0 in Memory space (hex) 000 00 001 04 002 08 003 0C 004 10 005 14 006 18 007 1C Table 5: Cardbus/PCI address map for the internal UART (I/O and memory) Note 1: Since 4K of memory space is reserved and the full bus address is not used for decoding, there are a number of aliases of the UART in the allocated memory region |
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