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0X23

Gain−

Compensated

Biquad

0X24

Low Pass

Biquad

BQ1

BQ2

Serial

Data

Format

Control

Chan.

1 − 6

DOWN

MIX

PWM1

PWM2

PWM3

PWM4

PWM5

PWM6

1 LF

2 RF

3 LS

4 RS

5 C

0X20

0X21

0X25

L’

R ’

L’

R ’

0X04

1 − 5

SDIN2

SDIN3

SDIN4

SDIN4

MUX

0X21

MUX

MUX

PWM

MUX

SDOUT

0X08

0X03

VOL

Chan

Select

VOL

VOL

VOL

VOL

MUX

6 Sub

Ch 1− 5

MUX

10 dB

(L’+R ’)/2

VOL

MUX

Down Mix

SDIN4

0X09

0X0A

0X0B

0X0C

0X0D

0X21

0X21

0X21

SDIN1

(L’+R ’)/2

(L’+R ’)/2

6 Sub

Bass Management

R

Channel 6 Processing Section

Ch

1−5

Ch 6

Sub

10 dB

0X21

MUX

VOL

BQ1

BQ2

BQ1 (G)

0X0D

0X23

Gain-

Compensation

Biquad

0X24

Low

Pass

Filter

Biquad

R

(L’ + R’)/2

TAS5086

SLES131 – FEBRUARY 2005

DETAILED DESCRIPTION (continued)

The I

write operations that are multiples of 4 data bytes These are 6, 10, 14, 18 ... etc., byte write operations that are

composed of a device address, read/write bit, and subaddress and any multiple of 4 bytes of data. This permits

the system to incrementally the write large register values without blocking other I

Figure 2 shows the data flow and control through the TAS5086. The major I

applicable block (e.g., 0

×04 is the Serial Data Format Control register).

Channel 6 has processing features that are directly applicable to the subwoofer channel.

Figure 3. Channel 6 Processing Block Diagram

9