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TAS5086 Datasheet(PDF) 17 Page - Texas Instruments |
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TAS5086 Datasheet(HTML) 17 Page - Texas Instruments |
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17 / 33 page ![]() www.ti.com SERIAL CONTROL INTERFACE REGISTER SUMMARY TAS5086 SLES131 – FEBRUARY 2005 I 2C SERIAL CONTROL INTERFACE (continued) The TAS5086 has two groups of I2C commands. One set is designed to be commands that are designed specifically to be operated while audio is streaming that has built in mechanisms to prevent noise, clicks, and pops. The other set does not have this built in protection. Commands that are designed to be adjusted while audio is streaming • Master Volume • Master Mute • Individual Channel Volume • Individual Channel Mute Command that the system executes without additional processing to prevent noise, clicks, or pops (in a number of cases this does not produce an audible click and pop) • Serial Data Interface Format • De-emphasis • Sample Rate Conversion • Input Multiplexer • Output Multiplexer • Biquads • Down Mix • Channel Delay • Enable/Disable Automatic MCLK and Data Rate Frequency Detection • Manual or Automatic MCLK and Data Rate Setting • Enable/Disable DC Blocking • Hard/Soft Unmute from Clock Error SUB-ADDRESS REGISTER NAME NO. OF CONTENTS INITIALIZATION VALUE (0xSS) BYTES A u indicates unused bits 0x00 Clock Control Register 1 Description shown in subsequent section 6C 0x01 Device ID Register 1 Description shown in subsequent section 03 0x02 Error Status Register 1 Description shown in subsequent section 00 0x03 System Control Register 1 1 Description shown in subsequent section A0 0x04 Serial Data Interface Register 1 Description shown in subsequent section 05 0x05 System Control Register 2 1 Description shown in subsequent section 60 0x06 Softmute Register 1 Description shown in subsequent section 00 0x07 Master Volume 1 Description shown in subsequent section FF (Mute) 0x08 Channel 1 Vol 1 Description shown in subsequent section 30 (0 dB) 0x09 Channel 2 Vol 1 Description shown in subsequent section 30 (0 dB) 0x0A Channel 3 Vol 1 Description shown in subsequent section 30 (0 dB) 0x0B Channel 4 Vol 1 Description shown in subsequent section 30 (0 dB) 0x0C Channel 5 Vol 1 Description shown in subsequent section 30 (0 dB) 0x0D Channel 6 Vol 1 Description shown in subsequent section 30 (0 dB) 0x0E Volume Control Register 1 Description shown in subsequent section B1 0x0F RESERVED(1) 0x10 Modulation Limit Register 1 Description shown in subsequent section 02 0x11–0x17 RESERVED(1) 0x18 PWM Start Register 1 Description shown in subsequent section 3F (1) Reserved registers should not be accessed. 17 |
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