AX58200 datasheet(85/180 Pages) ASIX

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AX58200

EtherCAT Slave Controller SoC

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Supports wake-up function by slave select signal in Slave mode

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Supports one data channel half-duplex transfer

USCI - I2C Mode

2.27.1 Overview

On I2C bus, data is transferred between a Master and a Slave. Data bits transfer on the SCL and SDA lines are

synchronously on a byte-by-byte basis. Each data byte is 8-bit. There is one SCL clock pulse for each data bit

with the MSB being transmitted first, and an acknowledge bit follows each transferred byte. Each bit is sampled

during the high period of SCL; therefore, the SDA line may be changed only during the low period of SCL and

must be held stable during the high period of SCL. A transition on the SDA line while SCL is high is interpreted

as a command (START or STOP). Please refer to Figure 2.27-1 for more detailed I2C BUS Timing.

tBUF

STOP

SDA

SCL

START

tHD_STA

tLOW

tHD_DAT

tHIGH

tSU_DAT

Repeated

START

tSU_STA

tSU_STO

STOP

Figure 2.27-1: I2C Bus Timing

The device’s on-chip I2C provides the serial interface that meets the I2C bus standard mode specification. The

I2C port handles byte transfers autonomously. The I2C mode is selected by FUNMODE (USCI_CTL [2:0]) =

100B. When enable this port, the USCI interfaces to the I2C bus via two pins: SDA and SCL. When I/O pins are

used as I2C ports, user must set the pins function to I2C in advance.

Note: Pull-up resistor is needed for I2C operation because the SDA and SCL are set to open-drain pins when

USCI is selected to I2C operation mode.

2.27.2 Features

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Full master and slave device capability

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Supports of 7-bit addressing, as well as 10-bit addressing

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Communication in standard mode (100 kBit/s) or in fast mode (up to 400 kBit/s)

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Supports multi-master bus

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Supports one transmit buffer and two receive buffer for data payload

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Supports 10-bit bus time-out capability

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Supports bus monitor mode.

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Supports Power down wake-up by data toggle or address match

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Supports setup/hold time programmable

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Supports multiple address recognition (two slave address with mask option)

AX58200 Datasheet(PDF) 85 Page - ASIX Electronics Corporation

AX58200 Datasheet(HTML) 85 Page - ASIX Electronics Corporation

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