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AX58200 Datasheet(PDF) 28 Page - ASIX Electronics Corporation |
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AX58200 Datasheet(HTML) 28 Page - ASIX Electronics Corporation |
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28 / 180 page  28 Copyright © 2019 ASIX Electronics Corporation. All rights reserved. AX58200 EtherCAT Slave Controller SoC Pin No Pin Name Type MFP Description used to bootstrap the mode setting to decide the PHY 1 media mode, please refer to Section 2.43.4.1. E2 SYNC_LATCH[1] B5/8m Distributed Clocks SyncSignal output or LatchSignal input 1 E3 SYNC_LATCH[0] B5/8m Distributed Clocks SyncSignal output or LatchSignal input 0 K2 EEP_DONE O5/8m EEPROM is loaded, PDI is active. B10 PDI_EMU I5 PDI Emulation enable D8 OE_EXT I5 Output Enable LRDn I5 Local bus Read SCLK I5 SPI Clock E4 SOF O5/8m Start-of-Frame LECSn I5 Local bus ESC Chip Select SCS_ESC I5 SPI Chip Select for ESC E5 OUTVLD O5/8m Output data Valid/Output event LWRn I5 Local bus Write MOSI I5 SPI data MOSI F4 EOF O5/8m End-of-Frame LFCSn I5 Local bus Function Chip Select SCS_FUNC I5 SPI Chip Select for Function G4 WD_TRIG O5/8m Watchdog Trigger LINT O5/T Local bus Interrupt SINT O5/T SPI Interrupt A10 SCL O5/T/4m /S I2C Serial Clock line for I2C master controller SCL is a tri-stateable output, which requires an external pull-up resistor. B9 SDA B5/T/4m /S I2C Serial Data line for I2C master controller. SDA is a tri-stateable output, which requires an external pull-up resistor. H4 LAT_IN I5 external data Latch LRDY O5/T Local bus Ready MISO O5 SPI data MISO H10 IO[0] B5/8m Digital /General Purpose I/O[7:0] LDA[0] B5 Local bus Data bus [7:0] MSCLK O5 SPI Master SCLK G9 IO[1] B5/8m Digital /General Purpose I/O[7:0] LDA[1] B5 Local bus Data bus [7:0] MMOSI O5 SPI Master MOSI F3 IO[2] B5/8m Digital /General Purpose I/O[7:0] LDA[2] B5 Local bus Data bus [7:0] MMISO I5 SPI Master MISO C9 IO[4] B5/8m Digital /General Purpose I/O[7:0] LDA[4] B5 Local bus Data bus [7:0] MSS[0] O5 SPI Master Slave Select J12 IO[16] B5/8m Digital /General Purpose I/O[23:16] LA[8] I5 Local bus Address bus LINK I5 LINK Provided by the PHY if a 100 Mbps (Full Duplex) link is established. G10 IO[17] B5/8m Digital /General Purpose I/O[23:16] LA[9] I5 Local bus Address bus |
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