AX58200 datasheet(84/180 Pages) ASIX

84 / 180 page

AX58200

EtherCAT Slave Controller SoC

USCI - SPI Mode

2.26.1 Overview

The SPI protocol of USCI controller applies to synchronous serial data communication and allows full duplex

transfer. It supports both master and Slave operation mode with the 4-wire bi-direction interface. SPI mode of

USCI controller performs a serial-to-parallel conversion on data received from a peripheral device, and a

parallel-to-serial conversion on data transmitted to a peripheral device. The SPI mode is selected by FUNMODE

(USCI_CTL[2:0]) = 0x1.

This SPI protocol can operate as master or Slave mode by setting the SLAVE (USCI_PROTCTL[0]) to

communicate with the off-chip SPI Slave or master device. The application block diagrams in master and Slave

mode are shown below.

Figure 2.26-1: SPI Master Mode Application Block Diagram

Figure 2.26-2: SPI Slave Mode Application Block Diagram

2.26.2 Features

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Supports Master or Slave mode operation (the maximum frequency -- Master = fPCLK / 2, Slave <

fPCLK / 5)

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Configurable bit length of a transfer word from 4 to 16-bit

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Supports one transmit buffer and two receive buffers for data payload

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Supports MSB first or LSB first transfer sequence

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Supports Word Suspend function

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Supports PDMA transfer

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Supports 3-wire, no slave select signal, bi-direction interface

AX58200 Datasheet(PDF) 84 Page - ASIX Electronics Corporation