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AX58200 Datasheet(PDF) 169 Page - ASIX Electronics Corporation |
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AX58200 Datasheet(HTML) 169 Page - ASIX Electronics Corporation |
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169 / 180 page  169 Copyright © 2019 ASIX Electronics Corporation. All rights reserved. AX58200 EtherCAT Slave Controller SoC 3.11.13 Function SPI Slave Timing Figure 3.11-31: Function SPI Slave with share pin Timing Diagram Symbol Description Min Typ Max Units TSCLK SCLK clock frequency - - 50 MHz TDO MISO data valid time after SCLK edge 9.2 - - ns TSU MOSI data setup time before SCLK edge 2 - - ns THD MOSI data hold time after SCLK edge 2 - - ns TCSSP SCS setup time before MISO active 7.6 - - ns TDHD SCS hold time after SCLK edge 21 - - ns TCSHD MISO data hold time after SCS de-assert 2.6 - - ns TGN SCS negation to next SCS assertion time 40 - - ns Table 3.11-8: Function SPI with share pin Timing Table Figure 3.11-32: Function SPI Slave with individual pin Timing Diagram Symbol Description Min Typ Max Units TSCLK SCLK clock frequency - - 47.5 MHz TDO MISO data valid time after SCLK edge 10.5 - - ns TSU MOSI data setup time before SCLK edge 2 - - ns THD MOSI data hold time after SCLK edge 2 - - ns TCSSP SCS setup time before MISO active 7.7 - - ns TDHD SCS hold time after SCLK edge 21 - - ns TCSHD MISO data hold time after SCS de-assert 2.5 - - ns TGN SCS negation to next SCS assertion time 40 - - ns Table 3.11-9: Function SPI with individual pin Timing Table |
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