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SC3200 Datasheet(PDF) 286 Page - Advanced Micro Devices |
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SC3200 Datasheet(HTML) 286 Page - Advanced Micro Devices |
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286 / 447 page ![]() 286 AMD Geode™ SC3200 Processor Data Book Core Logic Module - Audio Registers - Function 3 Revision 5.1 7 IRQ7 Internal. Configures IRQ7 for internal (software) or external (hardware) use. 0: External. 1: Internal. 6 Reserved. Must be set to 0. 5 IRQ5 Internal. Configures IRQ5 for internal (software) or external (hardware) use. 0: External. 1: Internal. 4 IRQ4 Internal. Configures IRQ4 for internal (software) or external (hardware) use. 0: External. 1: Internal. 3 IRQ3 Internal. Configures IRQ3 for internal (software) or external (hardware) use. 0: External. 1: Internal. 2 Reserved. Must be set to 0. 1 IRQ1 Internal. Configures IRQ1 for internal (software) or external (hardware) use. 0: External. 1: Internal. 0 Reserved. Must be set to 0. Offset 1Ch-1Fh Internal IRQ Control Register (R/W) Reset Value: 00000000h Note: Bits 31:16 of this register are Write Only. Reads to these bits always return a value of 0. 31 Mask Internal IRQ15. (Write Only) 0: Disable. 1: Enable. 30 Mask Internal IRQ14. (Write Only) 0: Disable. 1: Enable. 29 Reserved. (Write Only) Must be set to 0. 28 Mask Internal IRQ12. (Write Only) 0: Disable. 1: Enable. 27 Mask Internal IRQ11. (Write Only) 0: Disable. 1: Enable. 26 Mask Internal IRQ10. (Write Only) 0: Disable. 1: Enable. 25 Mask Internal IRQ9. (Write Only) 0: Disable. 1: Enable. 24 Reserved. (Write Only) Must be set to 0. 23 Mask Internal IRQ7. (Write Only) 0: Disable. 1: Enable. 22 Reserved. (Write Only) Must be set to 0. 21 Mask Internal IRQ5. (Write Only) 0: Disable. 1: Enable. Table 6-38. F3BAR0+Memory Offset: Audio Configuration Registers (Continued) Bit Description |
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