SC3200 datasheet(287/447 Pages) AMD

287 / 447 page

AMD Geode™ SC3200 Processor Data Book

287

Core Logic Module - Audio Registers - Function 3

Revision 5.1

Mask Internal IRQ4. (Write Only)

0: Disable.

1: Enable.

Mask Internal IRQ3. (Write Only)

0: Disable.

1: Enable.

Reserved. (Write Only) Must be set to 0.

Mask Internal IRQ1. (Write Only)

0: Disable.

1: Enable.

Reserved. (Write Only) Must be set to 0.

Assert Masked Internal IRQ15.

0: Disable.

1: Enable.

Assert Masked Internal IRQ14.

0: Disable.

1: Enable.

Reserved. Set to 0.

Assert Masked Internal IRQ12.

0: Disable.

1: Enable.

Assert masked internal IRQ11.

0: Disable.

1: Enable.

Assert Masked Internal IRQ10.

0: Disable.

1: Enable.

Assert Masked Internal IRQ9.

0: Disable.

1: Enable.

Reserved. Set to 0.

Assert Masked Internal IRQ7.

0: Disable.

1: Enable.

Reserved. Set to 0.

Assert Masked Internal IRQ5.

0: Disable.

1: Enable.

Assert Masked Internal IRQ4.

0: Disable.

1: Enable.

Assert Masked Internal IRQ3.

0: Disable.

1: Enable.

Reserved. Must be set to 0.

Table 6-38. F3BAR0+Memory Offset: Audio Configuration Registers (Continued)

Bit

Description

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