AM79C850 datasheet(67/97 Pages) AMD

67 / 97 page

P R E L I M I N A R Y

AMD

SUPERNET 3

Default Timer and Register Values

The following are the default timer/register values on

power-up reset.

Timer/Register

NPADDR

Default Value

Actual Time Value

MIR (1–0) register

12h & 13h

00 00 00 00h

-NA-

TMAX register

14h

03C7h

165.29664 ms

TVX register and timer

15h

85h

3.4068 ms

TRT timer (bit 20–5)

16h

03C7h

165.29664 ms

THT timer

17h

FFFFh

-NA-

TNEG register (bit 20–5)

18h

03C7h

165.29664 ms

TMRS register

19h

801Fh

-NA-

TREQ0 register

1ah

78E0h

165.29664 ms

TREQ1 register

1bh

0000h

TPRI(1–0) register

1c & 1d

FFFFh

-NA-

TSYNC register

1fh

0000h

-NA-

TMSYNC timer

40h

FA97h

3.5456 ms

(2xDMAX when ring

not operational)

CMDREG1

00h

0000h

-NA-

CMDREG2

01h

0000h

-NA-

ST1U

00h

0000h

-NA-

ST1L

01h

0007h

-NA-

ST2U

02h

4000h

-NA-

ST2L

03h

0000h

-NA-

ST3U

61h

4000h

-NA-

ST3L

62h

0000h

-NA-

IMSK1U

04h

FFFFh

-NA-

IMSK1L

05h

FFFFh

-NA-

IMSK2U

06h

FFFFh

-NA-

IMSK2L

07h

FFFFh

-NA-

IMSK3U

63h

FFFFh

-NA-

IMSK3L

64h

FFFFh

-NA-

IVR

65h

0000h

-NA-

IMR

66h

0000h

-NA-

SAID

08h

0000h

-NA-

LAIM

09h

0000h

-NA-

LAIC

0ah

0000h

-NA-

LAIL

0bh

0000h

-NA-

SAGP

0ch

0000h

-NA-

LAGM

0dh

0000h

-NA-

LAGC

0eh

0000h

-NA-

LAGL

0fh

0000h

-NA-

AM79C850 Datasheet(PDF) 67 Page - Advanced Micro Devices

AM79C850 Datasheet(HTML) 67 Page - Advanced Micro Devices

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