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PC8374L Datasheet(PDF) 208 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 208 Page - National Semiconductor (TI) |
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208 / 239 page ![]() 9.0 Legacy Functional Blocks (Continued) www.national.com 208 Revision1.1 02h EIR Event Identification R FCR FIFO Control W 03h LCR Link Control W BSR Bank Select R/W 04h MCR Modem/Mode Control R/W 05h LSR Link Status R/W 06h MSR Modem Status R 07h SPR Scratchpad R/W ASCR Auxiliary Status and Control Varies per bit Table 95. Bank Selection Encoding BSR Bits Bank Selected LCR 76543210 0 xxxxxxx 0 LCR Written 1 0 xxxxxx 1 1 1 xxxx 1 x 1 1 1 xxxxx 1 1 11100000 2 LCR Not Written 11100100 3 11101000 4 11101100 5 11110000 6 11110100 7 1 1 1 1 1 x 0 0 Reserved 1 1 0 x x x 0 0 Reserved Table 96. Bank 1 Register Map Offset Mnemonic Register Name Type 00h LBGD(L) Legacy Baud Generator Divisor (Low Byte) R/W 01h LBGD(H) Legacy Baud Generator Divisor (High Byte) R/W 02h Reserved 03h LCR/BSR Link Control/Bank Select R/W 04h - 07h Reserved Table 94. Bank 0 Register Map Offset Mnemonic Register Name Type Winbond Electronics Corp. Advanced PC Product Center |
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