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PC8374L Datasheet(PDF) 135 Page - National Semiconductor (TI) |
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PC8374L Datasheet(HTML) 135 Page - National Semiconductor (TI) |
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135 / 239 page ![]() 8.0 Health Management (HM) (Continued) Revision 1.1 135 www.national.com — The generated duty cycle is at its minimum at the low limit of the temperature, defined by the Zone ‘n’ Temperature Limit (see Section 8.5.63 on page 181 to Section 8.5.65). At, and below, this point the duty cycle is either 0% or an- other minimum value (the value contained in the FANPWMn Minimum register; see Section 8.5.79 on page 189 to Section 8.5.81). The decision to create a 0% duty-cycle or a minimum duty cycle other than 0% is made according to the MIN_ENn bit in the Min/Off, Spike Smoothing 1 register (see Section 8.5.74 on page 186). Below this point, a configurable hysteresis is applied by the HYSTn field in the Zone1-Zone2, Zone3 Hysteresis registers; see Section 8.5.69 on page 183 to Section 8.5.70. — If the temperature rises above the low limit, and the FANPWM is at 0% duty cycle, a spin-up process takes place. During spin-up the FANPWM output duty cycle is set to the value contained in the FANPWMn MAX Duty register (see Section 8.5.82 on page 189 to Section 8.5.84). For more information on the spin-up process see “Speed Change Modes” on page 136. — Between the low-limit and a temperature value of low-limit + range (range is configured by the RANGE field in the Zone ‘n’ Auto Speed Range and FANPWM ‘n’ Frequency registers; see Section 8.5.71 on page 183 to Section 8.5.73) the duty-cycle is changed linearly between a value of 0% and the value contained in the FANPWMn MAX Duty register (MAX_PWM field). The sampled temperature data from each temperature zone is low-pass filtered to prevent temperature spikes from affecting the FANPWM output duty cycle and thus to prevent spurious speed changes of the fans (which cause unpleasant noise). The rise time of the filter (0% to 95% of the incoming temperature change) is defined by the FILTn_EN bit and TEMP_FILTn field in Min/Off, Spike Smoothing 1-2 registers (see Section 8.5.74 on page 186). Figure 31. Temperature Normalization Figure 32. Automatic Fan Control Algorithm Temperature Normalized Temperature Hysteresis Range 0% (00h) 100% (7Fh) Very Low Temperature Absolute 8 C o Limit Temperature Range Hysteresis Very High Temperature Low Limit Temperature Duty Cycle 0% MAX_PWM Minimum Duty Cycle Spin-Up All Fans at MAX_PWM Duty Cycle Temperature Range Normalized Very Low Temperature Low Limit Temperature Very High (Absolute) Winbond Electronics Corp. Advanced PC Product Center |
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