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SPC584BX Datasheet(PDF) 24 Page - STMicroelectronics

Part # SPC584BX
Description  32-bit Power Architecture microcontroller for automotive ASIL-B applications
PDF  142 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPC584BX Datasheet(HTML) 24 Page - STMicroelectronics

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Electrical characteristics
SPC584Bx
24/142
DS11701 Rev 4
IDDSTBY32
CC
D
Total standby mode
current on VDD_LV and
VDD_HV supply, 32 KB
RAM(10)
TJ = 25 °C
60
130
µA
CTJ = 40 °C
200
DTJ = 55 °C
300
DTJ = 120 °C
1.8
mA
PTJ = 150 °C
4.1
IDDSTBY128
CC
D
Total standby mode
current on VDD_LV and
VDD_HV supply,
128 KB RAM(10)
TJ = 25 °C
90
160
µA
CTJ = 40 °C
250
µA
DTJ = 55 °C
370
µA
DTJ = 120 °C
1.2
2.2
mA
PTJ = 150 °C
2.8
5.0
IDDSSWU1
CC
D
SSWU running over all
STANDBY period with
OPC/TU commands
execution and keeping
ADC off(11)
TJ =40°C
1.0
3.5
mA
IDDSSWU2
CC
D
SSWU running over all
STANDBY period with
OPC/TU/ADC
commands execution
and keeping ADC
on(12)
TJ =40°C
3.5
5.0
mA
1. The ranges in this table are design targets and actual data may vary in the given range.
2. The leakage considered is the sum of core logic and RAM memories. The contribution of analog modules is not considered,
and they are computed in the dynamic IDD_LV and IDD_HV parameters.
3. IDD_LKG (leakage current) and IDD_LV (dynamic current) are reported as separate parameters, to give an indication of the
consumption contributors. The tests used in validation, characterization and production are verifying that the total
consumption (leakage+dynamic) is lower or equal to the sum of the maximum values provided (IDD_LKG +IDD_LV). The two
parameters, measured separately, may exceed the maximum reported for each, depending on the operative conditions and
the software profile used.
4. Use case: 1 x e200Z4 @120 MHz, HSM @60 MHz, all IPs clock enabled, Flash access with prefetch disabled, Flash
consumption includes parallel read and program/erase, all SARADC in continuous conversion, DMA continuously triggered
by ADC conversion, 2 DSPI / 8 CAN / 2 LINFlex transmitting, RTC and STM running, 1 x EMIOS running (4 channels in
OPWMT mode), FIRC, SIRC, FXOSC, PLL0-1 running. The switching activity estimated for dynamic consumption does not
include I/O toggling, which is highly dependent on the application. Details of the software configuration are available
separately. The total device consumption is IDD_LV + IDD_HV + IDD_LKG for the selected temperature.
5. Gateway use case: One core running at 120 MHz, HSM 40 MHz, DMA, PLL, FLASH read only 25%, 8xCAN, 1xSARADC.
6. BCM use case: One Core running at 80 MHz, HSM 40 MHz, DMA, PLL, FLASH read only 25%, 1xCAN, 3xSARADC.
7. Dynamic consumption of the HSM module, including the dedicated memories, during the execution of Electronic Code
Book crypto algorithm on 1 block of 16 byte of shared RAM.
8. Flash in Low Power. Sysclk at 120 MHz, HSM 60 MHz, PLL0_PHI at 400 MHz, XTAL at 40 MHz, FIRC 16 MHz ON,
RCOSC1M off. FlexCAN: instances: 0, 1, 2, 3, 4, 5, 6, 7 ON (configured but no reception or transmission), Ethernet ON
(configured but no reception or transmission), ADC ON (continuously converting). All others IPs clock-gated.
9. Sysclk = RC16 MHz, RC16 MHz ON, RC1 MHz ON, PLL OFF. All possible peripherals off and clock gated. Flash in power
down mode.
10. STANDBY mode: device configured for minimum consumption, RC16 MHz off, RC1 MHz on.
Table 8. Device consumption (continued)
Symbol
C
Parameter
Conditions
Value(1)
Unit
Min
Typ
Max



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