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SPC584BX Datasheet(PDF) 28 Page - STMicroelectronics

Part # SPC584BX
Description  32-bit Power Architecture microcontroller for automotive ASIL-B applications
PDF  142 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPC584BX Datasheet(HTML) 28 Page - STMicroelectronics

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Electrical characteristics
SPC584Bx
28/142
DS11701 Rev 4
Note:
When the device enters into standby mode, the LP pads have the input buffer switched-on.
As a consequence, if the pad input voltage VIN is VSS<VIN<VDD_HV, an additional
consumption can be measured in the VDD_HV domain. The highest consumption can be
seen around mid-range (VIN ~=VDD_HV/2), 2-3 mA depending on process, voltage and
temperature.
CP1
CC
D
Pad
capacitance
——
10
pF
Vdrift
CC
D
Input Vil/Vih
temperature
drift
In a 1 ms period, with a
temperature variation
<30 °C
——
100
mV
WFI
SR
C
Wakeup input
filtered pulse(1)
——
20
ns
WNFI
SR
C
Wakeup input
not filtered
pulse(1)
400
ns
1. In the range from WFI (max) to WNFI (min), pulses can be filtered or not filtered, according to operating temperature and
voltage. Refer to the device pinout IO definition excel file for the list of pins supporting the wakeup filter feature.
Table 10. I/O input electrical characteristics (continued)
Symbol
C
Parameter
Conditions
Value
Unit
Min
Typ
Max
Table 11. I/O pull-up/pull-down electrical characteristics
Symbol
C
Parameter
Conditions
Value
Unit
Min
Typ
Max
IWPU
CC
T
Weak pull-up
current
absolute value
VIN = 1.1 V(1)
——
130
A
P
VIN = 0.69 *
VDD_HV_IO(2)
15
RWPU
CC
D
Weak Pull-up
resistance
VDD_HV_IO = 5.0 V ±
10%
33
93
K
RWPU
CC
D
Weak Pull-up
resistance
VDD_HV_IO = 3.3 V ±
10%
19
62
K
IWPD
CC
T
Weak pull-
down current
absolute value
VIN = 0.69 *
VDD_HV_IO(1)
——
130
A
P
VIN = 0.9 V(2)
15
RWPD
CC
D
Weak Pull-
down
resistance
VDD_HV_IO = 5.0 V ±
10%
29
60
K
RWPD
CC
D
Weak Pull-
down
resistance
VDD_HV_IO = 3.3 V ±
10%
19
60
K
1. Maximum current when forcing a change in the pin level opposite to the pull configuration.
2. Minimum current when keeping the same pin level state than the pull configuration.



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