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CS47L85 Datasheet(PDF) 202 Page - Cirrus Logic |
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CS47L85 Datasheet(HTML) 202 Page - Cirrus Logic |
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202 / 370 page ![]() CS47L85 202 Rev 4.3 Read Message 2 – REQUEST_VALUE PARAMETER VALUE DESCRIPTION Source Address 0xSS ‘SS’ is the 8-bit Logical Address of the message source. This could be any active device on the bus, but is typically the Manager Device (0xFF). Destination Address 0xLL ‘LL’ is the 8-bit Logical Address of the message destination (i.e., the CS47L85 SLIMbus Interface Device). The value is assigned by the SLIMbus Manager Device. Access Mode 0b1 Selects Byte-based access mode. Byte Address 0xUUU Specifies the Value Map address, calculated as 0xA00 + (2 x 0xZZ), where ‘ZZ’ is bits [7:0] of the applicable Control Register address. Slice Size 0b001 Selects 2-byte slice size Transaction ID 0xTTTT ‘TTTT’ is the 16-bit Transaction ID for the message. The value is assigned by the SLIMbus Manager Device. Table 67 Register Read Message (2) Note that the first message may be omitted if its contents are unchanged from the previous CHANGE_VALUE message sent to the CS47L85. The CS47L85 will respond to the Register Read commands in accordance with the normal SLIMbus protocols. Note that the CS47L85 assumes that sufficient Control Space Slots are available in which to provide its response before the next REQUEST_VALUE message is received. The CS47L85 response is made using a REPLY_VALUE message; the SLIMbus Manager should wait until the REPLY_VALUE message has been received before sending the next REQUEST_VALUE message. If additional REQUEST_VALUE message(s) are received before the CS47L85 response has been made, then the earlier REQUEST_VALUE message(s) will be ignored (i.e., only the last REQUEST_VALUE message will be serviced). SLIMBUS CLOCKING CONTROL The clock frequency of the SLIMbus interface is not fixed, and may be set according to the application requirements. The clock frequency can be reconfigured dynamically as required. The CS47L85 SLIMbus interface includes a Framer Device. When configured as the active Framer, the SLIMbus clock (SLIMCLK) is an output from the CS47L85. At other times, SLIMCLK is an input. The Framer function can be transferred from one device to another; this is known as Framer Handover, and is controlled by the Manager Device. The supported Root Frequencies in Active Framer mode are 24.576MHz or 22.5792MHz only. At other times, the supported Root Frequencies are as defined in the MIPI Alliance specification for SLIMbus. Under normal operating conditions, the SLIMbus interface operates with a fixed Root Frequency (RF); dynamic updates to the bus rate are applied using a selectable Clock Gear (CG) function. The Root Frequency and the Clock Gear setting are controlled by the Manager Device; these parameters are transmitted in every SLIMbus superframe to all devices on the bus. In Gear 10 (the highest Clock Gear setting), the SLIMCLK input (or output) frequency is equal to the Root Frequency. In lower gears, the SLIMCLK frequency is reduced by increasing powers of 2. The Clock Gear definition is shown in Table 68. Note that 24.576MHz Root Frequency is an example only; other frequencies are also supported. |
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