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CS47L85 Datasheet(PDF) 200 Page - Cirrus Logic

Part # CS47L85
Description  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 Datasheet(HTML) 200 Page - Cirrus Logic

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CS47L85
200
Rev 4.3
SLIMBUS CONTROL REGISTER ACCESS
Control register access is supported via the SLIMbus interface. Full read/write access to all registers is possible, via the
“User Value Elements” portion of the Value Map.
If the SLIMbus interface is used to access the DSP firmware memory registers, then a system clocking constraint must be
observed: the DSPCLK frequency, if enabled, must be greater than 1.3 x RF, where RF is the SLIMbus Root Frequency.
Note that, if DSPCLK is disabled (DSP_CLK_ENA=0), or if accessing other areas of the Register Map, the timing constraint
is not applicable. See “DSP Firmware Control” for details of the DSP Firmware memory. See “Clocking and Sample Rates”
for details of the DSPCLK signal.
Register Write operations are implemented using the “CHANGE_VALUE” message. A maximum of two messages may be
required, depending on circumstances: the first “CHANGE_VALUE” message selects the register page (bits [23:8] of the
Control Register address); the second message contains the data and bits [7:0] of the register address. The first message
may be omitted if the register page is unchanged from the previous Read or Write operation.
The required SLIMbus parameters are described in Table 62 and Table 63, for the generic case of writing the value 0xVVVV
to control register address 0xYYYYZZ. Note that it is also possible to write blocks of up to 16 bytes (to consecutive register
addresses), as described below.
Write Message 1
– CHANGE_VALUE
PARAMETER
VALUE
DESCRIPTION
Source Address
0xSS
‘SS’ is the 8-bit Logical Address of the message
source. This could be any active device on the bus,
but is typically the Manager Device (0xFF).
Destination Address
0xLL
‘LL’ is the 8-bit Logical Address of the message
destination (i.e., the CS47L85 SLIMbus Interface
Device). The value is assigned by the SLIMbus
Manager Device.
Access Mode
0b1
Selects Byte-based access mode.
Byte Address
0x800
Identifies the User Value element for selecting the
Control Register page address.
Slice Size
0b001
Selects 2-byte slice size
Value Update
0xYYYY
‘YYYY’ is bits [23:8] of the applicable Control
Register address.
Table 62 Register Write Message (1)
Write Message 2
– CHANGE_VALUE
PARAMETER
VALUE
DESCRIPTION
Source Address
0xSS
‘SS’ is the 8-bit Logical Address of the message
source. This could be any active device on the bus,
but is typically the Manager Device (0xFF).
Destination Address
0xLL
‘LL’ is the 8-bit Logical Address of the message
destination (i.e., the CS47L85 SLIMbus Interface
Device). The value is assigned by the SLIMbus
Manager Device.
Access Mode
0b1
Selects Byte-based access mode.
Byte Address
0xUUU
Specifies the Value Map address, calculated as
0xA00 + (2 x 0xZZ), where ‘ZZ’ is bits [7:0] of the
applicable Control Register address.
Slice Size
0b001
Selects 2-byte slice size
Value Update
0xVVVV
‘VVVV’ is the 16-bit data to be written.
Table 63 Register Write Message (2)
Note that the first message may be omitted if its contents are unchanged from the previous CHANGE_VALUE message
sent to the CS47L85.
Write transfers of up to 16 bytes can be configured using the ‘Slice Size’ parameter in the second message (see Table 63).
Additional ‘Value Update’ words can be appended to the message in this case, with the applicable data contents. For
compatibility with the CS47L85 register map, the selected number of bytes must always be an even number.



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