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CS47L85 Datasheet(PDF) 347 Page - Cirrus Logic |
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CS47L85 Datasheet(HTML) 347 Page - Cirrus Logic |
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347 / 370 page ![]() CS47L85 Rev 4.3 347 For details of the Boot Sequence , see “Control Write Sequencer”. The status of the CS47L85 digital I/O pins following Hardware Reset, Software Reset or Wake- Up is described in the “Power- On Reset (POR) ” section. The Device ID can be read back from Register R0. The Hardware Revision can be read back from Register R1. The Software Revision can be read back from Register R2. The Software Revision code is incremented if software driver compatibility or software feature support is changed. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R0 (0000h) Software_R eset 15:0 SW_RST_DEV_ ID [15:0] 6338h Writing to this register resets all registers to their default state. Reading from this register will indicate Device ID 6338h. R1 (0001h) Hardware_ Revision 7:0 HW_REVISION [7:0] Hardware Device revision. (incremented for every new revision of the device) R2 (0002h) Software_R evision 6:0 SW_REVISION [6:0] Software Device revision. (incremented if software driver compatibility or software feature support is changed) Table 135 Device Reset and ID |
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