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CS47L85 Datasheet(PDF) 349 Page - Cirrus Logic

Part # CS47L85
Description  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 Datasheet(HTML) 349 Page - Cirrus Logic

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CS47L85
Rev 4.3
349
APPLICATIONS INFORMATION
RECOMMENDED EXTERNAL COMPONENTS
ANALOGUE INPUT PATHS
The CS47L85 provides up to 6 analogue audio input paths. Each of these inputs is referenced to the internal DC reference,
VMID. A DC blocking capacitor is required for each analogue input pin used in the target application. The choice of capacitor
is determined by the filter that is formed between that capacitor and the impedance of the input pin. The circuit is illustrated
in Figure 87.
PGA
Input
C
R
Fc = high pass 3dB cut-off frequency
Fc =
1
2 RC
p
VMID
Figure 87 Audio Input Path DC Blocking Capacitor
In accordance with the CS47L85
input pin resistance (see “Electrical Characteristics”), it is recommended that a 1
F
capacitance for all input connections will give good results in most cases, with a 3dB cut-off frequency around 13Hz.
Ceramic capacitors are suitable, but care must be taken to ensure the desired capacitance is maintained at the AVDD
operating voltage. Also, ceramic capacitors may show microphonic effects, where vibrations and mechanical conditions give
rise to electrical signals. This is particularly problematic for microphone input paths where a large signal gain is required.
A single capacitor is required for a single-ended line or microphone input connection. For a differential input connection, a
DC blocking capacitor is required on both input pins.
The external connections for single-ended and differential microphones, incorporating the CS47L85 microphone bias circuit,
are shown later in the “Microphone Bias Circuit” section - see Figure 88.
DIGITAL MICROPHONE INPUT PATHS
The CS47L85 provides up to 8 digital microphone input paths; two channels of audio data can be multiplexed on each of
the DMICDATn pins. Each of these stereo pairs is clocked using the respective DMICCLKn pin.
The external connections for digital microphones, incorporating the CS47L85 microphone bias circuit, are shown later in the
“Microphone Bias Circuit” section - see Figure 90.
Ceramic decoupling capacitors for the digital microphones may be required - refer to the specific recommendations for the
application microphone(s).
When two microphones are connected to a single DMICDAT pin, the microphones must be configured to ensure that the
Left mic transmits a data bit when DMICCLK is high, and the Right mic transmits a data bit when DMICCLK is low. The
CS47L85 samples the digital microphone data at the end of each DMICCLK phase. Each microphone must tri-state its data
output when the other microphone is transmitting. Integrated pull-down resistors can be enabled on the DMICDAT pins if
required.
The voltage reference for each digital microphone interface is selectable. It is important that the selected reference for the
CS47L85 interface is compatible with the applicable configuration of the external microphone.



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