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CS47L85 Datasheet(PDF) 351 Page - Cirrus Logic

Part # CS47L85
Description  Low-Power Smart Codec with Seven DSP Cores, Voice and Media Enhancement, and Integrated Sensor Hub
PDF  370 Pages
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Manufacturer  CIRRUS [Cirrus Logic]
Direct Link  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS47L85 Datasheet(HTML) 351 Page - Cirrus Logic

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CS47L85
Rev 4.3
351
Digital microphone connection to the CS47L85 is illustrated in Figure 90.
Ceramic decoupling capacitors for the digital microphones may be required - refer to the specific recommendations for the
application microphone(s).
Digital Mic
MICVDD or MICBIASn
AGND
Digital Mic
VDD
CLK
DATA
VDD
CLK
DATA
CHAN
CHAN
VDD
DMICDATn
DMICCLKn
Digital
Microphone
Interface
The IN1, IN2, IN3 digital inputs are
referenced to MICVDD, or MICBIAS1/2/3.
The IN4, IN5, IN6 digital inputs are
referenced to DBVDD4.
The supply for each digital microphone
should the same voltage as the applicable
reference. Recommended that MICBIAS4
is used with IN4, IN5, IN6 only.
Figure 90 Digital Microphone Connection
The MICBIAS generators can each operate as a voltage regulator or in bypass mode.
See “Charge Pumps, Regulators and
Voltage Reference
” for details of the MICBIAS generators.
In Regulator mode, the MICBIAS regulators are designed to operate without external decoupling capacitors. The regulators
can be configured to support a capacitive load if required (e.g., for digital microphone supply decoupling). The compatible
load condition
s are detailed in the “Electrical Characteristics” section.
If the capacitive load on MICBIAS1, MICBIAS2 or MICBIAS3 exceeds the specified conditions for Regulator mode (e.g., due
to a decoupling capacitor or long PCB trace), then the respective generator must be configured in Bypass mode.
The maximum output current for each MICBIASn
pin is noted in the “Electrical Characteristics”. This limit must be observed
on each MICBIAS output, especially if more than one microphone is connected to a single MICBIAS pin. Note that the
maximum output current differs between Regulator mode and Bypass mode. The MICBIAS output voltage can be adjusted
using register control in Regulator mode.
HEADPHONE DRIVER OUTPUT PATH
The CS47L85 provides 3 stereo headphone output drivers. These outputs are all ground-referenced, allowing direct
connection to the external load(s). There is no requirement for DC blocking capacitors.
In single-ended (default) configuration, the headphone outputs comprise 6 independently controlled output channels, for up
to 3 stereo headphone or line outputs. In mono (BTL) mode, the headphone drivers support up to 3 differential outputs,
suitable for a mono earpiece or hearing coil load.
The headphone outputs incorporate a common mode, or ground loop, feedback path which provides rejection of system-
related ground noise. The feedback pins must be connected to ground for normal operation of the headphone outputs. A
separate feedback path is provided for each of the stereo headphone outputs. The HPOUT1 feedback is supported on two
pins - the applicable pin is selected using the ACCDET_SRC register bit.
The feedback pins should be connected to GND close to the respective headphone jack, as illustrated in Figure 91. In mono
(differential) mode, the feedback pin(s) should be connected to the ground plane that is physically closest to the earpiece
output PCB tracks.
It is recommended to ensure that the electrical characteristics of the PCB traces for each output pair are closely matched.
This is particularly important to matching the two traces of a differential (BTL) output.
Typical headphone and earpiece connections are illustrated in Figure 91.



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