MEC1632 datasheet(78/636 Pages) MICROCHIP

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MEC1632

DS00001592B-page 78

 2012-2018 Microchip Technology Inc.

5.10

Chip-Level (Global) Control/Configuration Registers

[00h - 2Fh]

The chip-level (global) registers reside in Logical Device 3Fh at AHB addresses FF_FF00h through FF_FF2Fh. All unim-

plemented registers and bits ignore writes and return zero when read. The global registers are accessed in the config-

uration address range [00h - 2Fh] in all Logical Devices. There is no Activate associated with Logical Device 3Fh: the

Global Configuration Registers are always accessible.

As with all Configuration Registers, the INDEX PORT is used to select a Global Configuration Register in the chip. The

DATA PORT is then used to access the selected register.

The Host can access all the Global Configuration registers at the offsets listed in Table 5-15, "Chip-Level (Global) Con-

trol/Configuration Registers" through the INDEX PORT and the DATA PORT. The EC can access all these registers at

the listed offsets from the AHB Base Address shown in Table 5-14, "MEC1632 Configuration Register Map".

Note 5-7

The SerIRQ Mode bit controls the SER_IRQ pin, the CLKRUN# pin and the affects of LPC DMA

requests on CLKRUN# (See Section 6.7, on page 84 and Section 6.8, on page 86.

TABLE 5-15:

CHIP-LEVEL (GLOBAL) CONTROL/CONFIGURATION REGISTERS

Offset

Description

CHIP (GLOBAL) CONTROL REGISTERS

Reserved

00h-03h

Reserved, Writes are ignored, reads return 0.

Reserved

04h - 06h

Reserved - Writes are ignored, reads return 0.

Logical Device Number

07h

A write to this register selects the current logical device. This

allows access to the control and configuration registers for

each logical device.

Note:

The Activate command operates only on the selected

logical device.

Reserved

08h - 1Fh

Reserved - Writes are ignored, reads return 0.

Device ID

Hard Wired

20h

A read-only register which provides device identification.

Device Revision

Hard Wired

21h

A read-only register which provides device revision information.

Bits[7:0] = current revision when read

Reserved

22h - 23h

Reserved - Writes are ignored, reads return 0.

Device Mode

24h

Bit [1:0] Reserved – writes ignored, reads return “0”.

Bit[2] SerIRQ Mode

(Note 5-7)

= 0: Serial IRQ Disabled.

= 1: Serial IRQ Enabled

(Default).

Bit [7:3] Reserved – writes ignored, reads return “0”.

Reserved

25h - 27h

Reserved - Writes are ignored, reads return 0.

Test Register

28h

MCHP Test Mode Register, Reserved for MCHP

Test Register

29h

MCHP Test Mode Register, Reserved for MCHP

Reserved

2Ah - 2Bh

Reserved - Writes are ignored, reads return 0.

Test Register

2Ch

MCHP Test Mode Register, Reserved for MCHP

Reserved

2Dh - 2Fh

Reserved - Writes are ignored, reads return 0.

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