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MB89663 Datasheet(PDF) 31 Page - fujitsu semiconductor |
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MB89663 Datasheet(HTML) 31 Page - fujitsu semiconductor |
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31 / 48 page ![]() MB89660 Series 31 (6) Serial I/O Timing and UART Timing (VCC = +5.0 V ±10%, AVSS = VSS = 0.0 V, TA = –40°C to +85°C) * : For information on tinst, see “(4) Instruction Cycle.” Parameter Symbol Pin Condition Value Unit Remarks Min. Max. Serial clock cycle time tSCYC SCK1, SCK2 Internal shift clock mode 2 tinst*— µs SCK1 ↓ → SO1 time SCK2 ↓ → SO2 time tSLOV SCK1, SO1 SCK2, SO2 –200 200 ns Valid SI1 → SCK1 ↑ Valid SI1 → SCK1 ↑ tIVSH SI1, SCK1 SI2, SCK2 1/2 tinst*— µs SCK1 ↑ → valid SI1 hold time SCK2 ↑ → valid SI2 hold time tSHIX SCK1, SI1 SCK2, SI2 1/2 tinst*— µs Serial clock “H” pulse width tSHSL SCK1, SCK2 External shift clock mode 1 tinst*— µs Serial clock “L” pulse width tSLSH SCK1, SCK2 1 tinst*— µs SCK1 ↓ → SO1 time SCK2 ↓ → SO2 time tSLOV SCK1, SO1 SCK2, SO2 0 200 ns Valid SI1 → SCK1 ↑ Valid SI2 → SCK2 ↑ tIVSH SI1, SCK1 SI2, SCK2 1/2 tinst*— µs SCK1 ↑ → valid SI1 hold time SCK2 ↑ → valid SI2 hold time tSHIX SCK1, SI1 SCK2, SI2 1/2 tinst*— µs |
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