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LM5145 Datasheet(PDF) 8 Page - Texas Instruments |
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LM5145 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 70 page ![]() 7.5 Electrical Characteristics (continued) TJ = –40°C to 125°C. Typical values are at TJ = 25°C and VIN = 12 V (unless otherwise noted). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT VPG-UV-HYST Power Good UV hysteresis Rising with respect to the regulated output 3.6% VPG-OV-HYST Power Good OV hysteresis Rising with respect to the regulation voltage 3.4% tOV-DLY OV filter time VOUT rising 25 µs tUV-DLY UV filter time VOUT falling 25 µs VPG-OL PG voltage Open collector, PG/SYNC = 2 mA 0.8 V SYNCHRONIZATION OUTPUT (PG/SYNCOUT) VSYNCOUT-LO SYNCOUT-LO low-state voltage RCNFG = 54.9 kΩ or 71.5 kΩ to GND (primary), PFM/SYNC = 2 mA 0.8 V VSYNCOUT-HO SYNCO-HO high-state voltage RCNFG = 54.9 kΩ, or 71.5 kΩ to GND (primary) PFM/SYNC = 2 mA 2.0 V tSYNCOUT Delay from HO rising edge to SYNCOUT (PG/SYNCOUT in primary mode) VPFM = 0 V, FSW set by RRT = 97.6 kΩ 2.1 µs STARTUP (Soft Start) tSS-INT Internal fixed soft-start time 1.9 3 4.6 ms BOOT CIRCUIT VBOOT-DROP Internal diode forward drop ICBOOT = 20 mA, VCC to CBOOT 0.63 0.8 V IBOOT CBOOT to SW quiescent current, not switching VEN = 5 V, VCBOOT-SW = 5 V 2.88 4.3 µA VBOOT-SW-UV-R CBOOT to SW UVLO rising threshold VCBOOT-SW rising 2.83 V VBOOT-SW-UV-F CBOOT to SW UVLO falling threshold VCBOOT-SW falling 2.5 V VBOOT-SW-UV-HYS CBOOT to SW UVLO hysteresis 0.05 V HIGH-SIDE GATE DRIVER (HO) VHO-HIGH HO high-state output voltage IHO = –100 mA, VHO-HIGH = VCBOOT – VHO 106 mV VHO-LOW HO low-state output voltage IHO = 100 mA 50 mV tHO-RISE HO rise time (10% to 90%) CLOAD = 2.7 nF 7 ns tHO-FALL HO fall time (90% to 10%) CLOAD = 2.7 nF 7 ns IHO-SRC HO peak source current VHO = VSW = 0 V, VCBOOT = VVCC = 5 V 2.2 A IHO-SINK HO peak sink current VVCC = 5 V 3.2 A LOW-SIDE GATE DRIVER (LO) VLO-LOW LO low-state output voltage ILO = 100 mA 50 mV VLO-HIGH LO high-state output voltage ILO = –100 mA 130 mV tLO-RISE LO rise time (10% to 90%) CLOAD = 2.7 nF 7 ns tLO-FALL LO fall time (90% to 10%) CLOAD = 2.7 nF 7 ns ILO-SRC LO peak source current VLO = VSW = 0 V, VVCC = 5 V 2.2 A ILO-SINK LO peak sink current VVCC = 5 V 3.2 A ADAPTIVE DEADTIME CONTROL tDEAD1 HO off to LO on deadtime 20 ns tDEAD2 LO off to HO on deadtime 20 ns INTERNAL HICCUP MODE HICDLY Hiccup mode activation delay VISNS+ –VVOUT > 60 mV 512 cycles HICCYCLES HICCUP mode fault VISNS+ –VVOUT > 60 mV 16384 cycles OVERCURRENT PROTECTION VCS-TH Current limit threshold Measured from ISNS+ to VOUT 49 60 73 mV tDELAY-ISNS+ ISNS+ delay to output 65 ns GCS CS amplifier gain 9 10 10.8 V/V IBIAS-ISNS+ CS amplifier input bias current 15 nA CONFIGURATION RCONF-OPT1 Primary, no spread spectrum 28.7 29.4 31 kΩ RCONF-OPT2 Primary, with spread spectrum 40.2 41.2 43.2 kΩ RCONF-OPT3 Primary, interleaved, no spread spectrum 53.6 54.9 57.6 kΩ LM5148 SNVSC01 – FEBRUARY 2023 www.ti.com 8 Submit Document Feedback Copyright © 2023 Texas Instruments Incorporated Product Folder Links: LM5148 |
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