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AFE7901 Datasheet(PDF) 34 Page - Texas Instruments

Part # AFE7901
Description  AFE7901 4T4R RF Sampling AFE with 12 GSPS DACs and 3 GSPS ADCs
PDF  160 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

AFE7901 Datasheet(HTML) 34 Page - Texas Instruments

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7.10 Timing Requirements
Typical values at TA = +25°C, full temperature range is TA,MIN = -40°C to TJ,MAX = +110°C; TX Input Rate = 491.52MSPS,
fDAC = 8847.36MSPS; fADC = 2949.12MSPS; nominal power supplies; 1 tone at -1 dBFS; DSA Attenuation =0dB; SerDes rate
= 24.33Gbps; unless otherwise noted.
MIN
NOM
MAX
UNIT
Timing: SYSREF+/-
ts(SYSREF)
Setup Time, SYSREF+/- Valid to Rising Edge of CLK+/-
50
ps
th(SYSREF)
Hold Time, SYSREF+/- Valid after Rising Edge of CLK+/-
50
ps
Timing: Serial ports
ts(SENB)
Setup Time, SENB to Rising Edge of SCLK
15
ns
th(SENB)
Hold Time, SENB after last Rising Edge of SCLK (1)
5 + tSCLK
ns
ts(SDIO)
Setup Time, SDIO valid to Rising Edge of SCLK
15
ns
th(SDIO)
Hold Time, SDIO valid after Rising Edge of SCLK
5
ns
t(SCLK)_W
Minimum SCLK period: registers write
25
ns
t(SCLK)_R
Minimum SCLK period: registers read
50
ns
td(data_out)
Minimum Data Output delay after Falling Edge of SCLK
0
ns
Maximum Data Output delay after Falling Edge of SCLK
15
ns
tRESET
Minimum RESETZ Pulse Width
1
ms
(1)
SDEN need to be held one more extra clock cycle with the last SCLK edge
AFE7901
SBASAO5 – APRIL 2023
www.ti.com
34
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Product Folder Links: AFE7901



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