AFE7901 datasheet(93/160 Pages) TI

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7.12.9 TX Typical Characteristics at 800 MHz (continued)

Typical values at TA = +25°C with nominal supplies. Unless otherwise noted, TX input data rate = 491.52 MSPS, fDAC =

11796.48 MSPS, interleave mode, AOUT = –1 dBFS, 1st Nyquist zone output, Internal PLL, fREF = 491.52 MSPS, 24x

Interpolation, DSA = 0 dB, Sin(x)/x enabled, DSA calibrated, TX Clock Dither Enabled

DSA (dB)

0.05

0.1

0.15

0.2

1TX

2TX

3TX

4TX

fDAC = 5898.24 MSPS, interleave mode, matching at 0.8 GHz

Integrated Phase Error = PhaseOUT(DSA Setting) –

PhaseOUT(DSA Setting = 0)

Figure 7-321. TX Uncalibrated Integrated Phase Error vs DSA

Setting and Channel at 0.85 GHz

DSA (dB)

-0.35

-0.3

-0.25

-0.2

-0.15

-0.1

-0.05

0.05

0.1

0.15

0.2

1TX

2TX

3TX

4TX

fDAC = 5898.24 MSPS, interleave mode, matching at 0.8 GHz

Integrated Phase Error = PhaseOUT(DSA Setting) –

PhaseOUT(DSA Setting = 0)

Figure 7-322. TX Calibrated Integrated Phase Error vs DSA

Setting and Channel at 0.85 GHz

DSA (dB)

-0.02

-0.01

0.01

0.02

-40qC

25qC

105qC

fDAC = 5898.24 MSPS, interleave mode, matching at 0.8 GHz

Differential Phase Error = PhaseOUT(DSA Setting – 1) –

PhaseOUT(DSA Setting) + 1

Figure 7-323. TX Uncalibrated Differential Phase Error vs DSA

Setting and Temperature at 0.85 GHz

DSA (dB)

-0.02

-0.01

0.01

0.02

-40qC

25qC

105qC

fDAC = 5898.24 MSPS, interleave mode, matching at 0.8 GHz,

channel with the median variation over DSA setting at 25°C

Differential Phase Error = PhaseOUT(DSA Setting – 1) –

PhaseOUT(DSA Setting) + 1

Figure 7-324. TX Calibrated Differential Phase Error vs DSA

Setting and Temperature at 0.85 GHz

DSA (dB)

-0.02

0.02

0.04

0.06

0.08

0.1

0.12

0.14

0.16

0.18

0.2

-40qC

25qC

105qC

fDAC = 5898.24 MSPS, interleave mode, matching at 0.8 GHz

Integrated Phase Error = PhaseOUT(DSA Setting) –

PhaseOUT(DSA Setting = 0)

Figure 7-325. TX Uncalibrated Integrated Phase Error vs DSA

Setting and Temperature at 0.85 GHz

DSA (dB)

-0.3

-0.25

-0.2

-0.15

-0.1

-0.05

-40qC

25qC

105qC

fDAC = 5898.24 MSPS, interleave mode, matching at 0.8 GHz

Integrated Phase Error = PhaseOUT(DSA Setting) –

PhaseOUT(DSA Setting = 0)

Figure 7-326. TX Calibrated Integrated Phase Error vs DSA

Setting and Temperature at 0.85 GHz

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AFE7901

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