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TMPR4925 Datasheet(PDF) 404 Page - Toshiba Semiconductor |
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TMPR4925 Datasheet(HTML) 404 Page - Toshiba Semiconductor |
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404 / 590 page ![]() Chapter 12 Timer/Counter 12-16 12.4.7 Pulse Generator Mode Register n (TMPGMRn) TMPGMR0 0xF030 TMPGMR1 0xF130 31 16 0 : Type : Initial value 15 14 13 10 TPIBE TPIAE 0 FFI R/W R/W R/W : Type 00 0 : Initial value Bits Mnemonic Field Name Description 31:16 Reserved 15 TPIBE TMCPRB Interrupt Enable Timer Pulse Generator Interrupt by TMCPRB Enable (Initial value: 0, R/W) When in the Pulse Generator mode, this bit sets Interrupt Enable/Disable for when TMCPRB and the counter value match. 0: Mask 1: Do not mask 14 TPIAE TMCPRA Interrupt Enable Timer Pulse Generator Interrupt by TMCPRA Enable (Initial value: 0, R/W) When in the Pulse Generator mode, this bit sets Interrupt Enable/Disable for when TMCPRA and the counter value match. 0: Mask 1: Do not mask 13:1 Reserved 0 FFI Flip Flop Default Initial TIMER Output Level (Initial value: 0, R/W) This bit specifies the TIMER[n] signal default when in the Pulse Generator mode. 0: Low 1: High Figure 12.4.7 Pulse Generator Mode Register |
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